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PDF ILA8362ANS Data sheet ( Hoja de datos )
| Número de pieza | ILA8362ANS | |
| Descripción | Multistandard TV Processor | |
| Fabricantes | IK Semiconductor | |
| Logotipo |  |
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TECHNICAL DATA
ILA8362ANS
Integrated PAL and PAL/NTSC TV processor
GENERAL DESCRIPTION
The ILA8362ANS is designed to be used in a multi-standard TV receiver and contains functional units for processing
signals of intermediate frequency of audio and sound, vertical scanning and line synchronisation of colour signal in
PAL/NTSC and RGB output signal.
The ILA8362ANS is pin to pin compatible with TDA8362A, Philips and nearly identical to the TDA8362. The main
difference between ILA8362ANS and TDA8362 is that ILA8362ANS contain a black-current stabilisation circuit.
Because of the required input pin for the black-current stabilisation circuit the luminance peaking function has been
momitted in the ILA8362ANS. All other function of the 2 IC's are identical. The pinning of the 2 IC's is slightly different,
because the ILA8362ANS have a ground connection on each side. This adoption of the pinning has positive effects on
othe application of the IC.
.cThe ILA8362ANS is single-chip TV processors which contain nearly all small signal functions that are required for a
colour television receiver. For a complete receiver the following circuits need to be added: a tuner, a SECAM decoder a
base-band delay line (ILA4661) and output stages for audio, video and horizontal and vertical deflection.
t4UFEATURES
e• Multistandard vision IF circuit (positive and negative modulation)
• Multistandard FM sound demodulator (4.5 Mhz to 6.5 Mhz)
e• Source selection for external A/V inputs (separate Y/C signals can also be applied)
h• Integrated chrominance trap and bandpass filters (automatically calibrated)
S• Integrated luminance delay line
ta• PAL/NTSC colour decoder with automatic search system
• Easy interfacing with the ILA8395 (SECAM decoder) for multistandard applications.
a• RGB control circuit with linear RGB inputs and fast blanking
• Input for automatic cut-off control with compensation for leakage current of the picture tube.
.D• Horizontal synchronisation with two control loops and alignment-free horizontal oscillator without external
components
w• Vertical count-down circuit (50/60 Hz) and vertical preamplifier
• Low dissipation (700 mW)
w• Small amount of peripheral components compared with competition ICs
w• Only one adjustment (vision IF demodulator)
• The ICs are mounted in a shrink DIL package with 52 pins
1
1 page  
ILA8362ANS
FUNCTIONAL DESCRIPTION
Video IF amplifier
The IF amplifier contains 3 AC-coupled control stages
with a total gain control range of greater than 60 dB and
sensitivity 70 µV.
The reference carrier for the video demodulator is
obtained by means of passive regeneration of the picture
carrier. The external reference tuned circuit is the only
remaining adjustment of the IC.
The polarity of the demodulator can be switched so that
the circuit is suitable for both positive and negative
modulated signals.
The AFC circuit is driven with the same reference signal
as the video demodulator. The AFC output voltage is 6 V.
The AGC detector operates on levels, top sync for
negative modulated and top white for positive modulated
signals. The AGC detector time constant capacitor is
connected externally. This is mainly because of the
flexibility of the application.
The time constant of the AGC system during positive
modulation is slow, this is to avoid any visible picture
variations. This, however, causes the system to react very
slowly to sudden changes in the input signal amplitude.
To overcome this problem a speed-up circuit has been
included which detects whether the AGC detector is
activated every frame period.
The circuit contains a video identification circuit which is
independent of the synchronisation circuit. Therefore
search tuning is possible when the display section of the
receiver is used as a monitor. In the normal television
mode the identification output is connected to the
coincidence detector, this applies to all three devices. The
identification output voltage is LOW when no transmitter
is identified. In this condition the sound demodulator is
switched off (mute function). When a transmitter is
identified the output voltage is HIGH. The voltage level
is dependent on the frequency of the incoming
chrominance signal.
Sound circuit
The sound bandpass and trap filters have to be connected
externally. The filtered intercarrier signal is fed to a
limiter circuit and is demodulated by means of a PLL
demodulator. The PLL circuit tunes itself automatically
to the incoming signal, consequently, no adjustment is
required.
Synchronisation circuit
The sync separator is proceeded by a voltage controlled
amplifier which adjusts the sync pulse amplitude to a
fixed level. The sync pulses are then fed to the slicing
stage (separator) which operates at 50% of the amplitude.
The separated sync pulses are fed to the first phase
detector and to the coincidence detector. The coincidence
detector is used for transmitter identification and to detect
whether the line oscillator is synchronised.
The line oscillator operates at twice the line frequency.
The oscillator network is internal. Because of the spread
of internal components an automatic adjustment circuit
has been added to the IC. The circuit compares the
oscillator frequency with that of the crystal oscillator in
the colour decoder. This results in a free-running
frequency which deviates less than 2% from the typical
value.
The circuit employs a second control loop to generate the
drive pulses for the horizontal driver stage.
X-ray protection can be realised by switching the pin of
the second control loop to the positive supply line. The
detection circuit must be connected externally. When the
X-ray protection is active the horizontal output voltage is
switched to a high level. When the voltage on this pin
returns to its normal level the horizontal output is
released again.
The IC contains a start-up circuit for the horizontal
oscillator. When this feature is required a current of
5.5 mA has to be supplied to pin 36. For an application
without start-up both supply pins (10 and 36) must be
connected to the 8 V supply line.
The drive signal for the vertical ramp generator is
generated by means of a divider circuit. The RC network
for the ramp generator is external.
Integrated video filters
The circuit contains a chrominance bandpass and trap
circuit. The filters are realised by means of gyrator
circuits and are automatically tuned by comparing the
tuning frequency with the crystal frequency of the
decoder.
When the pin is left open-circuit the trap is switched off
so that the circuit can also be used for S-VHS
applications.
The luminance delay line and the delay for the peaking
circuit are also realised by means of gyrator circuits.
Colour decoder
The colour decoder in the various ICs contains an
alignment-free crystal oscillator, a colour killer circuit
and colour difference demodulators. The 90° phase shift
for the reference signal is achieved internally.
5
5 Page 
ILA8362ANS
Symbol
Parameter
tW Burst key pulse width
tW Vertical blanking pulse width
td Delay of start of burst key to start of sync
VERTICAL SECTION
flock Locking range
LF Locking range (lines/frame)
VERTICAL RAMP GENERATOR
I43 Input current during scan
Idis
Vsaw(p-p)
td
Discharge current during retrace
Sawtooth amplitude (peak-to-peak value)
Delay from field-to-field
VERTICAL OUTPUT
VO(max) Maximum available output voltage
VO(min) Minimum available output voltage
VERTICAL FEEDBACK INPUT
V42 DC input voltage
V42 AC input voltage
I42 Input current
∆tp
∆T/∆V
Internal pre-correction to sawtooth
Temperature dependency on amplitude
VGL Vertical guard switching level with respect to the DC feedback
level; switching level LOW
VGH Vertical guard switching level with respect to the DC feedback
level; switching level HIGH
td Delay of scan start
Colour demodulation part
CHROMINANCE AMPLIFIER
∆CCor AGC control range
∆V Change in amplitude of the output signals over the ACC range
THRon Threshold colour killer ON
HYSoff Hysteresis colour killer OFF
CHROMINANCE AMPLIFIER
Phase-locked loop
fCR Catching range
∆ϕ Phase shift for ±200 Hz deviation of the oscillator frequency
Oscillator
TC
∆f
RI
Temperature coefficient of fOSC
fOSC deviation with respect to VP
Input resistance (pin 34)
Guaranteed
Limits
Min Max
3.3 3.7
14 14
5.2 5.6
Unit
µs
lines
µs
45 64.5 Hz
488 722
- 2.0 µA
0.28 0.52 mA
1.3 1.7 V
- 1.6 µs
4 -V
- 0.3 V
2.0 3.0 V
0.7 1.3 V
- 15 µA
2.1 3.9 %
- 1%
-1.5 - V
- +1.5 V
98 182 ms
26 - dB
- 2 dB
-30 -38 dB
+2 +6 dB
±300 - Hz
- 2 deg
- 2.5 Hz/K
- 250 HZ
1.05 1.95 kΩ
11
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| PDF Descargar | [ Datasheet ILA8362ANS.PDF ] | |
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