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PDF UDQ2559 Data sheet ( Hoja de datos )
| Número de pieza | UDQ2559 | |
| Descripción | PROTECTED QUAD POWER DRIVER | |
| Fabricantes | Allegro MicroSystems | |
| Logotipo |  |
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2559
Protected Quad Power Driver
Features and Benefits
▪ 700 mA output current per channel
▪ Independent overcurrent protection for each driver
▪ Thermal protection for device and each driver
▪ Low output-saturation voltage
▪ Integral output flyback diodes
▪ TTL and 5 V CMOS-compatible inputs
Packages:
16-pin DIP
with exposed thermal tabs
(B package)
28-pin PLCC
(Package EB)
Not to scale
16-pin SOICW
with internally fused pins
(LB package)
Description
Providing improved output current limiting, the UDK,
UDN, and UDQ2559B, EB, and LB quad power drivers
combine AND logic gates and high-current bipolar outputs
with complete output protection. Each of the four outputs
sink 700 mA in the on state. The outputs have a minimum
breakdown voltage (load dump) of 60 V and a sustaining
voltage of 40 V. The inputs are compatible with TTL and
5 V CMOS logic systems.
Overcurrent protection for each channel has been designed
into these devices and is activated at approximately 1 A. It
protects each output from short circuits with supply voltages
up to 25 V. When an output current trip point is reached, that
output stage is driven linearly resulting in a reduced output
current level. If an over-current or short-circuit condition
continues, the thermal-limiting circuits will first sense the rise
in junction temperature and then the rise in chip temperature,
further decreasing the output current. Under worst-case
conditions, these devices will tolerate short circuits on all
outputs, simultaneously.
These devices can be used to drive various loads including
incandescent lamps (without warming or limiting resistors)
or inductive loads such as relays, solenoids, or dc stepping
motors.
The packages offer fused leads for enhanced thermal dissipation.
Package B is a 16-pin power DIP with exposed tabs, EB is a
28-lead power PLCC, and LB is a 16-lead power wide-body
SOIC for surface-mount applications. They are lead (Pb) free
with 100% matte tin leadframe plating.
ENABLE
INN
Functional Block Diagram
(1 of 4 Channels)
VCC
K
OUTN
Thermal
Limit
<< 1Ω
29317.14L
1 page  
2559
Protected Quad Power Driver
ELECTRICAL CHARACTERISTICS at TA = +25°C (prefix ‘UDN’) or over operating
temperature range (prefix ‘UDK’ or ‘UDQ’), VCC = 4.75 V to 5.25 V
Characteristic
Output Leakage Current
Output Sustaining Voltage
Output Saturation Voltage
Over-Current Trip
Input Voltage
Input Current
Total Supply Current*
Clamp Diode Forward Voltage
Clamp Diode Leakage Current
Turn-On Delay
Thermal Limit
Symbol
ICEX
VOUT(SUS)
VOUT(SAT)
ITRIP
Logic 1
Logic 0
Logic 1
Logic 0
ICC
VF
IR
tPHL
tPLH
TJ
Test Conditions
VOUT = 50 V, VIN = 0.8 V, VEN = 2.0 V
VOUT = 50 V, VIN = 2.0 V, VEN = 0.8 V
IOUT = 100 mA, VIN = VEN = 0.8 V
All Devices, IOUT = 100 mA
All Devices, IOUT = 400 mA
B or EB package only, IOUT = 600 mA
VIN(1) or VEN(1)
VIN(0) or VEN(0)
VIN(1) or VEN(1) = 2.0 V
VIN(0) or VEN(0) = 0.8 V
All Outputs ON, VIN = VEN = 2.0 V
All Outputs OFF
IF = 1.0 A
IF = 1.5 A
VR = 50 V, D1 + D2 or D3 + D4
IOUT = 500 mA
IOUT = 500 mA
Min.
—
—
40
—
—
—
—
2.0
—
—
—
—
—
—
—
—
—
—
—
Limits
Typ. Max.
<1.0 100
<1.0 100
——
— 300
— 500
— 700
1.0 —
——
— 0.8
— 40
— -10
— 80
— 5.0
— 1.7
— 2.1
— 50
— 20
— 20
165 —
Typical Data is for design information only.
Negative current is defined as coming out of (sourcing) the specified terminal.
As used here, -100 is defined as greater than +10 (absolute magnitude convention) and the minimum is implicitly zero.
* All inputs simultaneously, all other tests are performed with each input tested separately.
Units
μA
μA
V
mV
mV
mV
A
V
V
μA
μA
mA
mA
V
V
μA
μs
μs
°C
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet UDQ2559.PDF ] | |
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