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PDF IN74HC373A Data sheet ( Hoja de datos )

Número de pieza IN74HC373A
Descripción Octal D-type Latch
Fabricantes IK Semiconductor 
Logotipo IK Semiconductor Logotipo



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No Preview Available ! IN74HC373A Hoja de datos, Descripción, Manual

TECHNICAL DATA
Octal 3-State Noninverting
Transparent Latch
High-Performance Silicon-Gate CMOS
IN74HC373A
The IN74HC373A is identical in pinout to the LS/ALS373. The
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
These latches appear transparent to data (i.e., the outputs change
asynchronously) when Latch Enable is high. When Latch Enable goes
low, data meeting the setup and hold time becomes latched.
The Output Enable input does not affect the state of the latches, but
when Output Enable is high, all device outputs are forced to the high-
impedance state. Thus, data may be latched even when the outputs are not
enabled.
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 µA
High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
IN74HC373AN Plastic
IN74HC373ADW SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 20=VCC
www.datasheet4u.cPoINm10 = GND
FUNCTION TABLE
Inputs
Output Latch
Enable Enable
LH
LH
LL
HX
X = Don’t Care
Z = High Impedance
D
H
L
X
X
Output
Q
H
L
No Change
Z
1

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IN74HC373A pdf
IN74HC373A
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Figure 3. Switching Waveforms
Figure 4. Switching Waveforms
Figure 5. Test Circuit
Figure 6. Test Circuit
EXPANDED LOGIC DIAGRAM
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