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Número de pieza | SDA9255 | |
Descripción | SRC Scan Rate Converter | |
Fabricantes | Siemens | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de SDA9255 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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SRC-Scan Rate Converter
SDA 9255
Data Sheet 1998-02-01
1 page SDA 9255
Table of Contents
Page
1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.3 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.4 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.5 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2
2.1
2.2
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.4
2.4.1
2.4.2
2.4.3
2.4.4
2.5
2.6
2.7
2.7.1
2.7.2
2.7.3
2.7.4
System Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Input Data Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Output Data Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Input Timing and Parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Delay of Vertical Input Synchronization Signal . . . . . . . . . . . . . . . . . . . . . . 11
Number of Active Lines of an Input Field . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Number of Not Active Lines of an Input Field . . . . . . . . . . . . . . . . . . . . . . . . 12
Not Active Pixels of Input Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Output Timing and Parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Number of Not Active Lines of Output Field . . . . . . . . . . . . . . . . . . . . . . . . . 14
Number of Not Active Pixels of Output Field . . . . . . . . . . . . . . . . . . . . . . . . 15
VOUT, HOUT and HREF Signal Length . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Output Synchronization Raster and Interlaced Output Signal . . . . . . . . . . . 16
Motion Adaptive Temporal Noise Reduction . . . . . . . . . . . . . . . . . . . . . . . . 17
Digital Vertical Zooming and Panning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
I2C Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
I2C-Bus Slave Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
I2C-Bus Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
I2C-Bus Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
3.1 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3.2 Characteristics (Assuming Recommended Operating Conditions) . . . . 34
4 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
5 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.1 Input Timing of the SDA 9255 (HSINP = 0) . . . . . . . . . . . . . . . . . . . . . . . . . 36
5.2 Output Timing of the SDA 9255 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
5.3 Internal Vertical Synchronization Signal (VSINP = 0) . . . . . . . . . . . . . . . . . 37
5.4 Example for Not Active Input Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
5.5 Example for Not Active Output Register . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
5.6 Example for Not Active Output Pixels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
5.7 Timing for HOUT Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
5.8 Timing for VOUT Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
5.9 Timing for HREF Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Semiconductor Group
3
1998-02-01
5 Page SDA 9255
2 System Description
The device generates at its output an opportune sequence of 100/120 Hz fields (ααββ)
[50/60 Hz frames (αβ)] derived by processing the field A or B which is stored in one
internal field memory. The fields can be noise reduced and vertically zoomed.
Additionally the device generates a vertical sync pulse, a horizontal sync pulse and a
horizontal reference signal (horizontal active video output) in phase with the output data.
Furthermore an interlace signal for AC coupled vertical deflection is available.
2.1 Input Data Formats
The SDA 9255 accepts at the input side the following input format (relations of Y : (B-Y) :
(R-Y) : 4 : 1 : 1). The representation of the samples of the chrominance signal is
programmable as positive dual code (unsigned) or two's complement code (TWOIN,
TWOOUT, subaddress 00H, see description of I2C Bus).
Data
Pin
SDA 9255
YIN7
Y07 Y17 Y27 Y37
YIN6
Y06 Y16 Y26 Y36
YIN5
Y05 Y15 Y25 Y35
YIN4
Y04 Y14 Y24 Y34
YIN3
Y03 Y13 Y23 Y33
YIN2
Y02 Y12 Y22 Y32
YIN1
Y01 Y11 Y21 Y31
YIN0
Y00 Y10 Y20 Y30
UVIN7 U07 U05 U03 U01
UVIN6 U06 U04 U02 U00
UVIN5 V07 V05 V03 V01
UVIN4 V06 V04 V02 V00
XAB: X: signal component, A: sample number, B: bit number
The amplitude resolution for each input signal component is 8 Bit, the maximum clock
frequency is 27 MHz.
Semiconductor Group
9
1998-02-01
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet SDA9255.PDF ] |
Número de pieza | Descripción | Fabricantes |
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SDA9254-2 | 2.6 MBit Dynamic Sequential Access Memory for Television Applications (TV-SAM) with On-chip Noise Reduction Filter | Siemens |
SDA9255 | SRC Scan Rate Converter | Siemens |
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