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PDF GM71VS17803CL Data sheet ( Hoja de datos )
| Número de pieza | GM71VS17803CL | |
| Descripción | (GM71VS17803CL / GM71V17803C) 2M x 8-Bit CMOS DRAM | |
| Fabricantes | Hynix Semiconductor | |
| Logotipo |  |
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Description
The GM71V(S)17803C/CL is the new
generation dynamic RAM organized 2,097,152
x 8 bit. GM71V(S)17803C/CL has realized
higher density, higher performance and various
functions by utilizing advanced CMOS process
technology. The GM71V(S)17803C/CL offers
Extended Data out(EDO) Page Mode as a high
speed access mode. Multiplexed address inputs
permit the GM71V(S)17803C/CL to be
packaged in standard 400 mil 28pin plastic SOJ,
and standard 400mil 28pin plastic TSOP II. The
package size provides high system bit densities
and is compatible with widely available
automated testing and insertion equipment.
Pin Configuration
GM71V17803C
GM71VS17803CL
2,097,152 WORDS x 8 BIT
CMOS DYNAMIC RAM
Features
* 2,097,152 Words x 8 Bit Organization
* Extended Data Out Mode Capability
* Single Power Supply (3.3V+/-0.3V)
* Fast Access Time & Cycle Time
(Unit: ns)
t t t tRAC CAC RC HPC
GM71V(S)17803C/CL-5
GM71V(S)17803C/CL-6
GM71V(S)17803C/CL-7
50 13 84
60 15 104
70 18 124
20
25
30
* Low Power
Active : 396/360/324mW (MAX)
Standby : 7.2mW (CMOS level : MAX)
0.36mW (L-version : MAX)
* RAS Only Refresh, CAS before RAS Refresh,
Hidden Refresh Capability
*All inputs and outputs TTL Compatible
* 2048 Refresh Cycles/32ms
* 2048 Refresh Cycles/128ms (L-version)
* Self Refresh Operation (L-version)
* Battery Back Up Operation (L-version)
28 SOJ
VCC 1
I/O0 2
I/O1 3
I/O2 4
I/O3 5
WE 6
RAS 7
NC 8
A10 9
A0 10
A1 11
A2 12
mA3 13
oVCC 14
www.datasheet4u.cRev 0.1 / Apr’01
28 VSS
27 I/O7
26 I/O6
25 I/O5
24 I/O4
23 CAS
22 OE
21 A9
20 A8
19 A7
18 A6
17 A5
16 A4
15 VSS
28 TSOP II
VCC 1 VSS
I/O0 2 I/O7
I/O1 3 I/O6
I/O2 4 I/O5
I/O3 5 I/O4
WE 6 CAS
RAS 7
NC 8
A10 9
A0 10
A1 11
A2 12
A3 13
VCC 14 VSS
28 VSS
27 I/O7
26 I/O6
25 I/O5
24 I/O4
23 CAS
22 OE
21 A9
20 A8
19 A7
18 A6
17 A5
16 A4
15 VSS
(Top View)
1 page  
Read Cycle
Symbol
Parameter
tRAC
tCAC
tAA
tOAC
tRCS
tRCH
tRRH
tRAL
tCAL
tCLZ
tOH
tOHO
tOFF
tOEZ
tCDD
tRCHR
tOHR
tOFR
tWEZ
tWDD
tRDD
Access Time from RAS
Access Time from CAS
Access Time from Address
Access Time from OE
Read Command Setup Time
Read Command Hold Time to CAS
Read Command Hold Time to RAS
Column Address to RAS Lead Time
Column Address to CAS Lead Time
CAS to Output in Low-Z
Output Data Hold Time
Output Data Hold Time from OE
Output Buffer Turn-off Time
Output Buffer Turn-off Time to OE
CAS to DIN Delay Time
Read Command Hold Time from RAS
Output Data hold Time from RAS
Output Buffer turn off to RAS
Output Buffer turn off to WE
WE to DIN Delay Time
RAS to DIN Delay Time
GM71V17803C
GM71VS17803CL
GM71V(S)17803 GM71V(S)17803 GM71V(S)17803
C/CL-5
C/CL-6
C/CL-7
Min Max Min Max Min Max
Unit
Note
- 50 - 60 - 70 ns
8,9
- 13 - 15 - 18 ns 9,10,17
- 25 - 30 - 35 ns 9,11,17
- 13 - 15 - 18 ns
9
0- 0- 0-
ns
0 - 0 - 0 - ns 12
5 - 5 - 5 - ns 12
25 - 30 - 35 -
ns
15 - 18 - 23 -
ns
0- 0- 0-
ns
3- 3- 3-
ns
3- 3- 3-
ns
- 13 - 15 - 15
ns
13
- 13 - 15 - 15
ns
13
13 - 15 - 18 -
ns
5
50 - 60 - 70 -
ns
3 - 3- 3-
ns
- 13 - 15 - 15
ns
- 13 - 15 - 15
ns
13 - 15 - 18 -
ns
13 - 15 - 18 -
ns
Rev 0.1 / Apr’01
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet GM71VS17803CL.PDF ] | |
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