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PDF UPD75P316A Data sheet ( Hoja de datos )
| Número de pieza | UPD75P316A | |
| Descripción | 4-BIT SINGLE-CHIP MICROCOMPUTER | |
| Fabricantes | NEC | |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD75P316A
4-BIT SINGLE-CHIP MICROCOMPUTER
DESCRIPTION
The µPD75P316A is a product of the µPD75316 with on-chip ROM having been replaced with the one-time PROM
or EPROM.
It is most suitable for test production during system development and for production in small amounts since it
can operate under the same supply voltage as mask products.
The one-time PROM product is capable of writing only once and is effective for production of many kinds of sets
in small quantities and early startup. The EPROM product allows program writing and rewriting, and is therefore
suitable for system evaluation. The on-chip RAM has twice the capacity of the µPD75316/75P316, enabling large
amounts of data to be processed.
Details of functions are described in the User's Manual shown below. Be sure to read in design.
µPD75308 User's Manual : IEM-5016
FEATURES
• Compatible (excluding mask option) with the mask products
• Memory capacity
• Program memory (PROM) : 16256 × 8 bits
• Data memory (RAM)
: 1024 × 4 bits
• Low-voltage operation capability: 2.7 to 6.0 V
ORDERING INFORMATION
Ordering Code
Package
µPD75P316AGF-3B9
80-pin plastic QFP (14 × 20 mm)
µPD75P316AK
80-pin ceramic WQFN (LCC with window)
On-Chip ROM
One-time PROM
EPROM
QUALITY GRADE
Ordering Code
µPD75P316AGF-3B9
µPD75P316AK
Package
80-pin plastic QFP (14 × 20 mm)
80-pin ceramic WQFN (LCC with window)
Quality Grade
Standard
Standard
Please refer to “Quality grade on NEC Semiconductor Devices” (Document number IEI-1209) published by
NEC Corporation to know the specification of quality grade on the devices and its recommended applications.
In descriptions common to one-time PROM products and EPROM products in this document, the term "PROM" is
used.
The information in this document is subject to change without notice.
Document No. IC-2524A
(O. D. No. IC-7950B)
Date Published October 1993 P
Printed in Japan
The mark 5 shows major revised points.
© NEC Corporation 1992
1 page  
µPD75P316A
1. PIN FUNCTIONS
1.1 PORT PINS (1/2)
Pin Name
P00
P01
P02
P03
P10
P11
P12
P13
P20
P21
P22
P23
P30 *2
P31 *2
P32 *2
P33 *2
Input/Output
Input
Input/output
Input/output
Input/output
Input
Input/output
Input/output
Dual-
Function Pin
Function
8-Bit I/O
INT4
SCK
SO/SB0
4-bit input port (PORT0)
Internal pull-up resistor specification by soft-
ware is possible for P01 to P03 as a 3-bit unit.
×
SI/SB1
INT0
With noise elimination circuit
INT1
INT2
TI0
4-bit input port (PORT1)
Internal pull-up resistor specification by soft-
ware is possible as a 4-bit unit.
×
PTO0
— 4-bit input/output port (PORT2)
Internal pull-up resistor specification by soft- ×
PCL ware is possible as a 4-bit unit.
BUZ
LCDCL MD0
SYNC MD1
MD2
Programmable 4-bit input/output port (PORT3)
Input/output settable bit-wise.
Internal pull-up resistor specification by soft-
ware is possible as a 4-bit unit.
MD3
×
Afer Reset
Input
I/O Circuit
Type*1
B
F -A
F -B
M-C
Input
B -C
Input
E-B
Input
E-B
P40 to P43*2 Input/output
N-ch open-drain 4-bit input/output port (PORT
—
4).
Data input/output pins for program memory
(PROM) write/verify (low-order 4 bits).
High impedance M - A
P50 to P53 *2 Input/output
N-ch open-drain 4-bit input/output port (PORT 5)
— Data input/output pins for program memory
(PROM) write/verify (high-order 4 bits).
High impedance M - A
P60 KR0
Programmable 4-bit input/output port (PORT6).
P61
Input/output
KR1
Input/output settable bit-wise.
Internal pull-up resistor specification by soft-
P62
KR2
ware is possible as a 4-bit unit.
P63 KR3
P70 KR4
P71
KR5
4-bit input/output port (PORT7).
Input/output
Internal pull-up resistor specification by soft-
P72
KR6
ware is possible as a 4-bit unit.
P73 KR7
* 1. : Indicates a Schmitt-triggered input.
2 . Direct LED drive capability.
Input
F -A
Input
F -A
5
5 Page 
µPD75P316A
1.4 CAUTION ON USING P00/INT4 PIN AND RESET PIN
The P00/INT4 and RESET pins have a test mode setting function (IC test only) which tests internal operations of
the µPD75P316A in addition to those functions given in 1.1 and 1.2.
The test mode is set when voltage greater than VDD is applied to either pin. Therefore, even during normal
operation, the test mode is engaged when noise greater than VDD is added, thus causing interference with normal
operation.
For example, this problem may occure if the P00/INT4 and RESET pins wiring is too long, causing line noise.
To avoid this, try to suppress line noise in wiring. If line noise is still high, try elimminating the noise using the
exterior add-on components shown in the Figures below.
5
• Connect a diode with low VF between the VDD
and the pin.
• Connect a condenser between the VDD and the pin.
VDD
VDD
Diode with
Small VF
VDD
P00/INT4, RESET
VDD
P00/INT4, RESET
2. DIFFERENCES BETWEEN PRODUCTS IN SERIES
The µPD75P316A is a product of the µPD75316 with on-chip mask ROM having been replaced with the one-time
PROM or EPROM. If you use PROM for debugging the applied system or trial manufacturing, and proceed to use
masked ROM products for mass production, do so only with a full understanding of their differences beforehand.
Also, µPD75P316A functions are an extension of those of the µPD75P316. Table 2-1 shows the differences between
the series products. All products have the same functions except as indicated in this table.
For the details of the CPU functions and the built-in hardware, please refer to the µPD75308 User's Manual (IEM-
5016).
11
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