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PDF NCP1001 Data sheet ( Hoja de datos )

Número de pieza NCP1001
Descripción (NCP1000 - NCP1002) Integrated Off-Line Switching Regulator
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No Preview Available ! NCP1001 Hoja de datos, Descripción, Manual

NCP1000, NCP1001,
NCP1002
Integrated Off−Line
Switching Regulator
The NCP1000 through NCP1002 series of integrated switching
regulators, combine a fixed frequency PWM controller with an
integrated high voltage power switch circuit. This chip allows for
simple design and minimal parts count for very low cost applications
which utilize an ac input. This chip is designed to power a single ended
topology, typically a discontinuous mode flyback, with secondary side
sensing.
The internal high voltage switch circuit and start−up circuit can
function in continuous operation over a wide range of inputs, from 85
Vac to 265 Vac, and thus can be used in any existing power system in
the world. Though inexpensive, these devices include a number of
features such as undervoltage lockout, over−temperature protection,
bandgap reference and leading edge blanking that make them an
excellent value.
Features
Highly Integrated Solution
Operates Over Universal Input Voltage Range (85 Vac to 265 Vac)
On−board 700 Volt Power Switch Circuit
Minimal External Parts Required
Input Undervoltage Lockout with Hysteresis
Very Low Standby Current
No Minimum Load Requirement
Opto Fail−safe Shutdown Circuit
Typical Applications
Cell Phone Chargers
Wall Adapters
On−board AC−DC Converters
VCC START−UP
INTERNAL BIAS
UVLO &
OPTO FAIL−SAFE
START−UP
CIRCUIT
FEEDBACK
INPUT
GND
+
PWM
PWM CONTROL
& POWER
SWITCH CIRCUIT
COMPARATOR
POWER
SWITCH
CIRCUIT
OSCILLATOR
http://onsemi.com
8
DIP−8
NCP100xP
8
P SUFFIX
AWL
CASE 626
YYWW
11
Pin: 1.
2.
3, 6−8
4.
5.
VCC
Feedback Input
Ground
Startup
Power Switch Circuit
x = Device Number 0, 1, or 2
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
ORDERING INFORMATION*
Device
Package
Shipping
Ipk Ron
Typ Max
(A) (W)
NCP1000P DIP−8 50 Units/Rail 0.5 18
NCP1001P DIP−8 50 Units/Rail 1.0 9
NCP1002P DIP−8 50 Units/Rail 1.5 6
*Consult factory for additional optocoupler fail−safe
latching, frequency, and current limit options.
Figure 1. Simplified Block Diagram
© Semiconductor Components Industries, LLC, 2003
December, 2003 − Rev. 7
1
Publication Order Number:
NCP1000/D

1 page




NCP1001 pdf
NCP1000, NCP1001, NCP1002
0.800
2
0.700
0.600
1.5
0.500
0.400
1
0.300
0.200
0.5
0.100
0.000
0.8
1
1.2 1.4
lfb (mA)
1.6
Figure 2. Duty Cycle vs. FB Input Current
1.8
0
01
2 34 5 6
VCC (V)
789
Figure 3. ICC vs. VCC
1000
100
10
1
1 10 100
Capacitance (mF)
Figure 4. Charge Time vs. VCC Capacitance
4.00
3.50
3.00
2.50
2.00
1.50
1.00
0.50
VCC = 4.0 V
0.00
1
10 100
Start−up Voltage (V) (Pin 4)
1000
Figure 5. Startup Current vs. Startup Voltage
100
NCP1002
NCP1001
10
NCP1000
1.0
10
100
Switch Voltage (V)
Figure 6. Power Switch Circuit
Capacitance vs. Voltage
1000
104.0
102.0
100.0
98.0
96.0
94.0
92.0
90.0
88.0
86.0
−40 −25
0 25 50 75
Temperature (°C)
100
Figure 7. Oscillator Frequency
vs. Temperature
125
http://onsemi.com
5

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NCP1001 arduino
NCP1000, NCP1001, NCP1002
Applications
Do not attempt to construct a converter circuit on a
wire−wrap or plug−in prototype board. In order to ensure
proper device operation and stability, it is important to
minimize the lead length and the associated inductance of
the ground pin. This pin must connect as directly as possible
to the printed circuit ground plane and should not be bent or
offset by the board layout. The Power Switch Circuit pin can
be offset if additional layout creepage distance is required.
Due to the potentially high rate of change in switch current,
a capacitor (if used), at pin 2, should have traces as short as
possible, from pin 2 and ground. This will significantly
reduce the level of switching noise that can be imposed upon
the feedback control signal.
AC Line
Input
+
Snubber
Bypass
+
Auxiliary Output
+
Auto Restart Timing
VCC
Start−Up
4
1
Feedback
Input
2
+
Loop Compensation
10 V
VCC Limiter 8.6 V
10 V Opto Fail−safe
Start−Up
Internal
Bias
State Control
Power up−reset
10 mA
Oscillator
Duty Cycle
Clock
Ramp
+ Undervoltage
8.5 V/ Lockout
7.5 V
Thermal
Shutdown
Ck R
Divide
by 8
Q
PWM Latch
S
Q
R
Driver
Power Switch
Circuit
5
7.0 kHz
Filter
2.7 k
PWM
Comparator
Current Limit
Comparator
Leading Edge
Blanking
+ Rpk
Ground 3
Figure 17. Representative Block Diagram
+
+ Converter
DC Output
http://onsemi.com
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