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PDF AD5171 Datasheet ( Hoja de datos )

64-Position OTP Digital Potentiometer - Analog Devices

Número de pieza AD5171
Descripción 64-Position OTP Digital Potentiometer
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo
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AD5171 datasheet

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AD5171 pdf
AD5171
TIMING CHARACTERISTICS: 5 kΩ, 10 kΩ, 50 kΩ, AND 100 kΩ
VDD = 3 V to 5 V ± 10%, VA = VDD, VB = 0 V, −40°C < TA < +125°C, unless otherwise noted.
Table 2.
Parameter
INTERFACE TIMING CHARACTERISTICS (APPLY TO ALL PARTS2, 3)
SCL Clock Frequency
tBUF Bus Free Time Between Start and Stop
tHD;STA Hold Time (Repeated Start)
tLOW Low Period of SCL Clock
tHIGH High Period of SCL Clock
tSU;STA Setup Time for Start Condition
tHD;DAT Data Hold Time
tSU;DAT Data Setup Time
tF Fall Time of Both SDA and SCL Signals
tR Rise Time of Both SDA and SCL Signals
tSU;STO Setup Time for Stop Condition
OTP Program Time
Symbol Conditions
fSCL
t1
t2 After this period, the
first clock pulse is generated
t3
t4
t5
t6
t7
t8
t9
t10
t11
1 Typical specifications represent average readings at 25°C and VDD = 5 V.
2 Guaranteed by design; not subject to production test.
3 All dynamic characteristics use VDD = 5 V.
Min Typ1 Max Unit
400 kHz
1.3 μs
0.6 μs
1.3 μs
0.6 50 μs
0.6 μs
0.9 μs
0.1 μs
0.3 μs
0.3 μs
0.6 μs
400 ms
t8 t9 t6
SCL
SDA
t2
t8
t3
t1
PS
t4
t9
t5
t7
Figure 3. Interface Timing Diagram
t10
P
Rev. D | Page 5 of 24

5 Page

AD5171 arduino
AD5171
6
0 0x3F
0x20
–6
–12 0x10
–18 0x08
–24 0x04
–30 0x02
–36 0x01
–42
–48
–54
100
0x00
1k
10k
100k
FREQUENCY (Hz)
Figure 17. Gain vs. Frequency vs. Code, RAB = 100 kΩ
1M
80
TA = 25°C
CODE = 0x20
VA = 2.5V, VB = 0V
60
VDD = 5V DC ± 1.0V p-p AC
40 VDD = 3V DC ± 0.6V p-p AC
20
0
100 1k 10k 100k 1M
FREQUENCY (Hz)
Figure 18. Power Supply Rejection Ratio vs. Frequency
VDD = 5.5V
VA = 5.5V
VB = GND
fCLK = 100kHz
VW = 10mV/DIV
SCL = 5V/DIV
10mV 5V
500ns
Figure 19. Digital Feedthrough vs. Time
VDD = 5.5V
VA = 5.5V
fVCBLK=
GND
= 400kHz
DATA 0x00 0x3F
VW = 5V/DIV
SCL = 5V/DIV
5V 5V
5µs
Figure 20. Settling Time
VW = 50mV/DIV
VDD = 5.5V
VA = 5.5V
fVCBLK=
GND
= 100kHz
DATA 0x20 0x1F
SCL = 5V/DIV
50mV 5V
200ns
Figure 21. Midscale Glitch Energy
OTP PROGRAMMED AT MS
VDD = 5.5V
VA = 5.5V
RAB = 10k
VW = 1V/DIV
VDD = 5V/DIV
1V 5V
5µs
Figure 22. Power-Up Settling Time After Fuses Blown
Rev. D | Page 10 of 24

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