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PDF TC58FVXB-70 Data sheet ( Hoja de datos )

Número de pieza TC58FVXB-70
Descripción (TC58Fxxx) 32-MBIT (4M x 8 BITS / 2M x 16 BITS) CMOS FLASH MEMORY
Fabricantes Toshiba Semiconductor 
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TC58FVT321/B321FT/XB-70,-10
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
32-MBIT (4M × 8 BITS / 2M × 16 BITS) CMOS FLASH MEMORY
DESCRIPTION
The TC58FVT321/B321 is a 33,554,432-bit, 3.0-V read-only electrically erasable and programmable flash memory
organized as 4,194,304 words × 8 bits or as 2,097,152 words × 16 bits. The TC58FVT321/B321 features commands
for Read, Program and Erase operations to allow easy interfacing with microprocessors. The commands are based on
the JEDEC standard. The Program and Erase operations are automatically executed in the chip. The
TC58FVT321/B321 also features a Simultaneous Read/Write operation so that data can be read during a Write or
Erase operation.
FEATURES
Power supply voltage
Block erase architecture
VDD = 2.7 V~3.6 V
8 × 8 Kbytes / 63 × 64 Kbytes
Operating temperature
Boot block architecture
Ta = −40°C~85°C
TC58FVT321FT/XB: top boot block
Organization
TC58FVB321FT/XB: bottom boot block
4M × 8 bits / 2M × 16 bits
Mode control
Functions
Compatible with JEDEC standard commands
Simultaneous Read/Write
Auto Program, Auto Erase
Erase/Program cycles
105 cycles typ.
Fast Program Mode / Acceleration Mode
Access time
Program Suspend/Resume
70 ns
(CL: 30 pF)
Erase Suspend/Resume
100 ns
(CL: 100 pF)
data polling / Toggle bit
block protection, boot block protection
Automatic Sleep, support for hidden ROM area
Power consumption
10 µA
(Standby)
30 mA
(Read operation)
common flash memory interface (CFI)
15 mA
(Program/Erase operations)
Byte/Word Modes
Package
TC58FVT321/B321FT:
TSOPI48-P-1220-0.50 (weight: 0.51 g)
TC58FVT321/B321XB:
P-TFBGA56-0710-0.80AZ (weight: 0.125 g)
000630EBA1
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid
situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to
property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most
recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide
for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
The Toshiba products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These Toshiba products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control
instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of Toshiba products listed in this document
shall be made at the customer’s own risk.
The products described in this document are subject to the foreign exchange and foreign trade laws.
The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by
TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its
use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or
others.
The information contained herein is subject to change without notice.
2002-08-06 1/48

1 page




TC58FVXB-70 pdf
TC58FVT321/B321FT/XB-70,-10
COMMAND SEQUENCES
COMMAND
SEQUENCE
BUS
WRITE
CYCLES
REQD
FIRST BUS
WRITE CYCLE
Addr. Data
SECOND BUS
WRITE CYCLE
Addr. Data
THIRD BUS FOURTH BUS
WRITE CYCLE WRITE CYCLE
Addr. Data Addr. Data
FIFTH BUS
WRITE CYCLE
Addr. Data
SIXTH BUS
WRITE CYCLE
Addr. Data
Read/Reset
1 XXXH F0H
Read/Reset
ID Read
Word
Byte
Word
Byte
3
3
555H
AAAH
AAH
2AAH
555H
555H
AAAH
AAH
2AAH
555H
555H
(1) (2)
55H
F0H RA
RD
AAAH
(3)
BK
+
555H
(4)
55H (3) 90H IA
BK +
(5)
ID
AAAH
Word
Auto-Program
Byte
Program Suspend
Program Resume
4
1
1
555H
2AAH
AAH
55H
555H
(6) (7)
A0H PA
PD
AAAH
555H
AAAH
(3)
BK B0H
(3)
BK 30H
Auto Chip
Erase
Word
Byte
6
555H
2AAH
555H
555H
2AAH
555H
AAH 55H 80H AAH 55H 10H
AAAH
555H
AAAH
AAAH
555H
AAAH
Auto Block
Erase
Word
Byte
Block Erase Suspend
Block Erase Resume
Block Protect 2
Verify Block
Protect
Word
Byte
6
1
1
4
3
555H
2AAH
AAH
55H
555H
555H
2AAH
(8)
80H AAH
55H BA
30H
AAAH
555H
AAAH
AAAH
555H
(3)
BK B0H
(3)
BK 30H
(9)
XXXH 60H BPA
60H
(9) (10)
XXXH 40H BPA BPD
555H
AAAH
AAH
2AAH
555H
(3)
BK +
555H
(9) (10)
55H (3) 90H BPA BPD
BK +
AAAH
Fast Program
Set
Word
Byte
Fast Program
Fast Program Reset
3
2
2
555H
AAAH
XXXH
XXXH
AAH
A0H
90H
2AAH
555H
(6)
PA
XXXH
55H
(7)
PD
(13)
F0H
555H
AAAH
20H
Hidden ROM
Mode Entry
Word
Byte
3
555H
2AAH
555H
AAH 55H 88H
AAAH
555H
AAAH
Hidden ROM
Program
Word
Byte
4
555H
2AAH
AAH
55H
555H
(6) (7)
A0H PA
PD
AAAH
555H
AAAH
Hidden ROM
Erase
Word
Byte
6
555H
2AAH
AAH
55H
555H
555H
2AAH
(8)
80H AAH
55H BA
30H
AAAH
555H
AAAH
AAAH
555H
Hidden ROM
Mode Exit
Word
Byte
4
555H
2AAH
555H
AAH 55H 90H XXXH 00H
AAAH
555H
AAAH
Query
Command
(3)
BK +
Word
55H (11) (12)
2
(3)
BK
+
98H
CA
CD
Byte
AAH
Notes: The system should generate the following address patterns:
Word Mode: 555H or 2AAH on address pins A10~A0
Byte Mode: AAAH or 555H on address pins A10~A-1
DQ8~DQ15 are ignored in Word Mode.
(1) RA: Read Address
(2) RD: Read Data
(3) BK: Bank Address = A20~A15
(4) IA: Bank Address and ID Read Address (A6, A1, A0)
Bank Address = A20~A15
Manufacturer Code = (0, 0, 0)
Device Code = (0, 0, 1)
(5) ID: ID Data
(6) PA: Program Address
(7) PD:Program Data
(8) BA: Block Address = A20~A12
(9) BPA: Block Address and ID Read Address (A6, A1, A0)
Block Address = A20~A12
ID Read Address = (0, 1, 0)
(10) BPD: Verify Data
(11) CA:CFI Address
(12) CD:CFI Data
(13) F0H: 00H is valid too
2002-08-06 5/48

5 Page





TC58FVXB-70 arduino
Auto Block Erase / Auto Multi-Block Erase Modes
TC58FVT321/B321FT/XB-70,-10
The Auto Block Erase Mode and Auto Multi-Block Erase Mode are set using the Block Erase command. The
block address is latched on the falling edge of the WE signal in the sixth bus cycle. The block erase starts as
soon as the Erase Hold Time (tBEH) has elapsed after the rising edge of the WE signal. When multiple blocks
are erased, the sixth Bus Write cycle is repeated with each block address and Auto Block Erase command being
input within the Erase Hold Time (this constitutes an Auto Multi-Block Erase operation). If a command other
than an Auto Block Erase command or Erase Suspend command is input during the Erase Hold Time, the device
will reset the Command Register and enter Read Mode. The Erase Hold Time restarts on each successive rising
edge of WE . Once operation starts, all memory cells in the selected block are automatically preprogrammed to 0,
erased and verified as erased by the chip. The device status is indicated by the setting of the Hardware Sequence
flag. When the Hardware Sequence flag is read, the addresses of the blocks on which auto-erase operation is
being performed must be specified. If the selected blocks are spread across all nine banks, simultaneous
operation cannot be carried out.
All commands (except Erase Suspend) are ignored during an Auto Block Erase or Auto Multi-Block Erase
operation. Either operation can be aborted using a Hardware Reset. If an auto-erase operation is interrupted, it
cannot be completed correctly; therefore, a further erase operation is necessary to complete the erasing.
Any attempt to erase a protected block is ignored. If all the selected blocks are protected, the auto-erase
operation is not executed and the device returns to Read Mode 100 µs after the rising edge of the WE signal in
the last bus cycle.
If an auto-erase operation fails, the device remains in Erasing state and does not return to Read Mode. The
device status is indicated by the Hardware Sequence flag. After a failure either a Reset command or a Hardware
Reset is required to return the device to Read Mode. If multiple blocks are selected, it will not be possible to
ascertain the block in which the failure occurred. In this case either abandon use of the device altogether, or
perform a Block Erase on each block, identify the failed block, and stop using it. The host processor must take
measures to prevent subsequent use of the failed block.
Erase Suspend / Erase Resume Modes
Erase Suspend Mode suspends Auto Block Erase and reads data from or writes data to an unselected block.
The Erase Suspend command is allowed during an auto block erase operation but is ignored in all other oreration
modes . When the command is input, the address of the bank on which Erase is being performed must be
specified.
In Erase Suspend Mode only a Read, Program or Resume command can be accepted. If an Erase Suspend
command is input during an Auto Block Erase, the device will enter Erase Suspend Read Mode after tSUSE. The
device status (Erase Suspend Read Mode) can be verified by checking the Hardware Sequence flag. If data is
read consecutively from the block selected for Auto Block Erase, the DQ2 output will toggle and the DQ6 output
will stop toggling and RY/BY will be set to High-Impedance.
Inputting a Write command during an Erase Suspend enables a Write to be performed to a block which has not
been selected for the Auto Block Erase. Data is written in the usual manner.
To resume the Auto Block Erase, input an Erase Resume command. On input of the command, the address of
the bank on which the Write was being performed must be specified. On receiving an Erase Resume command,
the device returns to the state it was in when the Erase Suspend command was input. If an Erase Suspend
command is input during the Erase Hold Time, the device will return to the state it was in at the start of the
Erase Hold Time. At this time more blocks can be specified for erasing. If an Erase Resume command is input
during an Auto Block Erase, Erase resumes. At this time toggle output of DQ6 resumes and 0 is output on
RY/BY .
2002-08-06 11/48

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