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PDF UPD23C32340 Data sheet ( Hoja de datos )

Número de pieza UPD23C32340
Descripción (UPD23C32340 / UPD23C32380) 32M-BIT MASK-PROGRAMMABLE ROM
Fabricantes NEC 
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD23C32340, 23C32380
32M-BIT MASK-PROGRAMMABLE ROM
4M-WORD BY 8-BIT (BYTE MODE) / 2M-WORD BY 16-BIT (WORD MODE)
PAGE ACCESS MODE
Description
The µPD23C32340 and µPD23C32380 are 33,554,432 bits mask-programmable ROM. The word organization is
selectable (BYTE mode : 4,194,304 words by 8 bits, WORD mode : 2,097,152 words by 16 bits).
The active levels of OE (Output Enable Input) can be selected with mask-option.
The µPD23C32340 and µPD23C32380 are packed in 48-pin PLASTIC TSOP(I) and 48-pin TAPE FBGA.
Features
Pin compatible with NOR Flash Memory
Word organization
4,194,304 words by 8 bits (BYTE mode)
2,097,152 words by 16 bits (WORD mode)
Page access mode
BYTE mode : 8 byte random page access (µPD23C32340)
16 byte random page access (µPD23C32380)
WORD mode : 4 word random page access (µPD23C32340)
8 word random page access (µPD23C32380)
Operating supply voltage : VCC = 2.7 V to 3.6 V
Operating supply
voltage
VCC
3.0 V ± 0.3 V
3.3 V ± 0.3 V
Access time /
Page access time
ns (MAX.)
100 / 25
90 / 25
Power supply current (Active mode)
mA (MAX.)
µPD23C32340
µPD23C32380
40 55
Standby current
(CMOS level input)
µA (MAX.)
30
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. M15711EJ2V0DS00 (2nd edition)
Date Published February 2003 NS CP(K)
Printed in Japan
The mark shows major revised points.
2001

1 page




UPD23C32340 pdf
µPD23C32340, 23C32380
Input / Output Pin Functions
Pin name
Input / Output
Function
WORD, /BYTE
A0 to A20
(Address inputs)
O0 to O7, O8 to O14
(Data outputs)
O15, A1
(Data output 15,
LSB Address input)
/CE
(Chip Enable)
/OE or OE or DC
(Output Enable, Don't care)
VCC
Input
The pin for switching WORD mode and BYTE mode.
High level : WORD mode (2M-word by 16-bit)
Low level : BYTE mode (4M-word by 8-bit)
Input
Address input pins.
A0 to A20 are used differently in the WORD mode and the BYTE mode.
WORD mode (2M-word by 16-bit)
A0 to A20 are used as 21 bits address signals.
BYTE mode (4M-word by 8-bit)
A0 to A20 are used as the upper 21 bits of total 22 bits of address signal.
(The least significant bit (A1) is combined to O15.)
Output Data output pins.
O0 to O7, O8 to O14 are used differently in the WORD mode and the BYTE mode.
WORD mode (2M-word by 16-bit)
The lower 15 bits of 16 bits data outputs to O0 to O14.
(The most significant bit (O15) combined to A1.)
BYTE mode (4M-word by 8-bit)
8 bits data outputs to O0 to O7 and also O8 to O14 are high impedance.
Output, Input O15, A1 are used differently in the WORD mode and the BYTE mode.
WORD mode (2M-word by 16-bit)
The most significant output data bus (O15).
BYTE mode (4M-word by 8-bit)
The least significant address bus (A1).
Input
Chip activating signal.
When the OE is active, output states are following.
High level : High-Z
Low level : Data out
Input
Output enable signal. The active level of OE is mask option. The active level of OE
can be selected from high active, low active and Don’t care at order.
Supply voltage
GND
Ground
NC Not internally connected. (The signal can be connected.)
Data Sheet M15711EJ2V0DS
5

5 Page





UPD23C32340 arduino
µPD23C32340, 23C32380
Read Cycle Timing Chart 1
A0 to A20,
A1 Note1
(Input)
/CE (Input)
/OE or OE (Input)
O0 to O7,
O8 to O15 Note3
(Input)
tACC
tSKEW
tACC
tCE tDF Note2
High-Z
tOE
tOH
Data out
High-Z
tSKEW
tSKEW
tACC
tDF Note2
tOH
Data out
tOH
Data out
Notes 1. During WORD mode, A–1 is O15.
2. tDF is the time from inactivation of Chip Enable input (/CE) or Output Enable input (/OE or OE) to
high impedance state output.
3. During BYTE mode, O8 to O14 are high impedance and O15 is A–1.
Data Sheet M15711EJ2V0DS
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11 Page







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