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PDF PC8240 Data sheet ( Hoja de datos )
| Número de pieza | PC8240 | |
| Descripción | Integrated Processor Family | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de PC8240 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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Features
• 6.6 SPEC int 95, 5.5 SPECfp95 at 266 MHz (Estimated)
• Superscalar 603e Core
• Integer Unit (IU), Floating-Point Unit (FPU) (User Enabled or Disabled), Load/Store Unit
(LSU), System Register Unit (SRU), and a Branch Processing Unit (BPU)
• 16-Kbyte Instruction Cache
• 16-Kbyte Data Cache
• Lockable L1 Caches - Entire Cache or on a Per-way Basis up to 3 of 4 Ways
• Dynamic Power Management
• High-bandwidth Bus (32/64 bits Data Bus) to DRAM
• Supports 1-Mbyte to 1-Gbyte DRAM Memory
• 32-bit PCI Interface Operating up to 66 MHz
• PCI 2.1-compliant, 5.0V Tolerance
• Fint Max = 200 MHz
• FBus Max = 66 MHz
Description
The PC8240 combines a PowerPC™ 603e core microprocessor with a PCI bridge. The
PC8240’s PCI support will allow system designers to rapidly design systems using peripherals
already designed for PCI and the other standard interfaces. The PC8240 also integrates a high-
performance memory controller which supports various types of DRAM and ROM. The PC8240
is the first of a family of products that provides system level support for industry standard inter-
faces with a PowerPC microprocessor core.
The peripheral logic integrates a PCI bridge, memory controller, DMA controller, EPIC interrupt
controller, I2O controller, and a two-wire interface controller. The 603e core is a full-featured,
high-performance processor with floating-point support, memory management, 16-Kbyte
instruction cache, 16-Kbyte data cache, and power management features. The integration
reduces the overall packaging requirements and the number of discrete devices required for an
embedded system.
The PC8240 contains an internal peripheral logic bus that interfaces the 603e core to the
peripheral logic. The core can operate at a variety of frequencies, allowing the designer to trade
off performance for power consumption. The 603e core is clocked from a separate PLL, which
is referenced to the peripheral logic PLL. This allows the microprocessor and the peripheral
logic block to operate at different frequencies, while maintaining a synchronous bus interface.
The interface uses a 64- or 32-bit data bus (depending on memory data bus width) and a 32-bit
address bus along with control signals that enable the interface between the processor and
peripheral logic to be optimized for performance. PCI accesses to the PC8240’s memory space
are passed to the processor bus for snooping purposes when snoop mode is enabled.
The PC8240’s features serve a variety of embedded applications. In this way, the 603e core
and peripheral logic remain general-purpose. The PC8240 can be used as either a PCI host or
an agent controller.
Integrated
Processor
Family
PC8240
Screening/Quality/Packaging
This product is manufactured in full compliance with:
• Upscreening based upon Atmel standards
• Industrial temperature range
(Tc = -40°C, Tc = +110°C)
(Tc = -40°C, Tc = +125°C): ZD3 suffix
• Core power supply:
2.5 ± 5 % V (L-Spec for 200 MHz)
• I/O power supply: 3.0V to 3.6V
• 352 Tape Ball Grid Array (TBGA)
TP suffix
TBGA352
Tape Ball Grid Array
Rev. 2149A–HIREL–05/02
1
1 page  
PC8240
Table 1. PC8240 Pinout Listing (Continued)
Signal Name
Package Pin Number
TBEN
B14
QACK/DA0
F2
CHKSTOP_IN
D14
MAA[0 – 2]
AF2 AF1 AE1
MIV A16
PMAA[0 – 2]
AD18 AF18 AE19
Test/Configuration Signals
PLL_CFG[0 – 4]/
DA[10 – 6]
A22 B19 A21 B18 B17
TEST[0 – 1]
AD22 B20
TEST2
Y2
TEST3
AF20
TEST4
AC18
TCK
AF22
TDI AF23
TDO
AC21
TMS
AE22
TRST
AE23
Power and Ground Signals
GND
AA2 AA23 AC12 AC15 AC24 AC3
AC6 AC9 AD11 AD14 AD16 AD19
AD23 AD4 AE18 AE2 AE21 AE25 B2
B25 B6 B9 C11 C13 C16 C23 C4 C8
D12 D15 D18 D21 D24 D3 F25 F4
H24 J25 J4 L24 L3 M23 M4 N24 P3
R23 R4 T24 T3 V2 V23 W3
LVdd
AC20 AC23 D20 D23 G23 P23 Y23
GVdd
OVdd
Vdd
LAVdd
AB3 AB4 AC10 AC11 AC8 AD10
AD13 AD15 AD3 AD5 AD7 C10 C12
C3 C5 C7 D13 D5 D9 E3 G3 H4 K4
L4 N3 P4 R3 U3 V4 Y3
AB24 AD20 AD24 C14 C20 C24 E24
G24 J23 K24 M24 P24 T23 Y24
AA24 AC16 AC19 AD12 AD6 AD9
C15 C18 C21 D11 D8 F3 H23 J3 L23
M3 R24 T4 V24 W4
D17
Pin Type
Input
Output
Input
Output
Output
Output
Input
Input
Input
Input
I/O
Input
Input
Output
Input
Input
Ground
52 terminals
Reference
voltage
3.3V, 5.0V
Power for
Memory
Drivers
2.5V, 3.3V
PCI/Stnd
3.3V
Power for
Core 2.5V
Power for
DLL 2.5V
Power
Supply
OVdd
OVdd
OVdd
–
OVdd
OVdd
OVdd
OVdd
–
OVdd
OVdd
OVdd
OVdd
OVdd
OVdd
OVdd
–
LVdd
GVdd
OVdd
Vdd
LAVdd
Output Driver
Type
–
DRV_STD
–
DRV_MEM_DATA
DRV_STD
DRV_STD
Notes
(10)
(3)(4)
(10)
(3)(4)(6)
–
(3)(4)(6)(15)
–
–
–
–
DRV_STD
–
–
DRV_PCI
–
–
(4)(6)
(1)(6)(9)
(11)
(10)
(10)
(9)(12)
(9)(12)
–
(9)(12)
(9)(12)
––
––
––
––
––
––
2149A–HIREL–05/02
5
5 Page 
PC8240
Figure 5 depicts the die junction-to-ambient thermal resistance for four typical cases:
1. A heat sink is not attached to the TBGA package and there exists high board-
level thermal loading of adjacent components.
2. A heat sink is not attached to the TBGA package and there exists low board-
level thermal loading of adjacent components.
3. A heat sink (e.g. ChipCoolers #HTS255-P) is attached to the TBGA package and
there exists high board-level thermal loading of adjacent components.
4. A heat sink (e.g. ChipCoolers #HTS255-P) is attached to the TBGA package and
there exists low board-level thermal loading of adjacent components.
Figure 5. Die Junction-to-Ambient Resistance
18 No heat sink and high thermal board–level loading of
adjacent components
No heat sink and low thermal board–level loading of
16 adjacent components
Attached heat sink and high thermal board–level loading
of adjacent components
14 Attached heat sink and low thermal board–level loading
of adjacent components
12
10
8
6
4
2
0 0.5 1 1.5 2 2.5
Airflow Velocity (m/s)
2149A–HIREL–05/02
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PC8240.PDF ] | |
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