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PDF P174LPTI6373 Data sheet ( Hoja de datos )
| Número de pieza | P174LPTI6373 | |
| Descripción | Fast CMOS 3.3V 16-BitTransparent Latch | |
| Fabricantes | PerkinElmer Optoelectronics | |
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PI74LPT16373
Fast CMOS 3.3V 16-Bit
Transparent Latch
Features
• Compatible with LCX™ and LVT™ families of products
• Supports 5V Tolerant Mixed Signal Mode Operation
– Input can be 3V or 5V
– Output can be 3V or connected to 5V bus
• Advanced Low Power CMOS Operation
• Excellent output drive capability:
Balanced drives (24 mA sink and source)
• Pin compatible with industry standard double-density pinouts
• Low ground bounce outputs
• Hysteresis on all inputs
• Industrial operating temperature range: –40°C to +85°C
• Multiple center pins and distributed Vcc/GND pins minimize
switching noise
• Packaging:
– 48-pin 240-mil wide thin plastic TSSOP (A)
– 48-pin 300-mil wide plastic SSOP (V)
Description
Pericom Semiconductor’s PI74LPT16373 is a 16-bit transparent
latch designed with 3-state outputs and are intended for bus oriented
applications. The Output Enable and Latch Enable controls are
organized to operate as two 8-bit latches or one 16-bit latch. When
Latch Enable (LE) is HIGH, the flip-flops appear transparent to
the data. The data that meets the set-up time when LE is LOW is
latched. When OE is HIGH, the bus output is in the high impedance
state.
The PI74LPT16373 can be driven from either 3.3V or 5.0V
devices allowing this device to be used as a translator in a mixed
3.3/5.0V system.
Block Diagram
1OE
1LE
1D0
D
C
2OE
2LE
2D0
1O0
D
C
2O0
TO 7 OTHER CHANNELS
TO 7 OTHER CHANNELS
1 PS2069C 10/05/04
1 page  
PI74LPT16373
3.3V 16-Bit Transparent Latch
Switching Characteristics over Operating Range(1)
Parameters
Description
Conditions(2)
LPT16373
Com.
Min(3) Max
LPT16373A
Com.
Min(3)
Max
LPT16373C
Com.
Min(3) Max
Units
tPLH Propagation Delay
tPHL xDx to xOx
1.5 7.0 1.5 5.2 1.5 4.2
tPLH Propagation Delay
tPHL xLE to xOx
2.0 7.0 2.0 6.5 2.0 5.5
tPZH Output Enable Time
tPZL xOE to xOx
1.5 7.2 1.5 6.5 1.5 5.5
tPHZ
tPLZ
Output Disable Time(4) CL = 50pF
xOE to xOx
RL = 500Ω
1.5
7.2
1.5
5.5 1.5 5.0 ns
tSU
Setup Time HIGH
or LOW, xDx to xLE
2.0 2.0 2.0
tH
tW
tSK(O)
Hold Time HIGH
or LOW, xDx to xLE
xLE Pulse Width(4)
HIGH
Output Skew(5)
1.5 1.5 1.5
6.0 5.0 5.0
0.5 0.5 0.5
Notes:
1. Propagation Delays and Enable/Disable times are with VCC = 3.3V ±0.3V, normal range. For VCC = 2.7V, extended range, all Propagation
Delays and Enable/Disable times should be degraded by 20%.
2. See test circuit and waveforms.
3. Minimum limits are guaranteed but not tested on Propagation Delays.
4. This parameter is guaranteed but not production tested.
5. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
5 PS2069C 10/05/04
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet P174LPTI6373.PDF ] | |
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