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PDF CEF09N6 Data sheet ( Hoja de datos )
| Número de pieza | CEF09N6 | |
| Descripción | N-Channel Logic Level Enhancement Mode Field Effect Transistor | |
| Fabricantes | Chino-Excel Technology | |
| Logotipo |  |
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CEF09N6
Jul. 2002
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FEATURES
600V , 6A ,RDS(ON)= 1.2 Ω @VGS=10V.
Super high dense cell design for extremely low RDS(ON).
High power and current handling capability.
TO-220F full-pak for through hole.
G
D
6
G
D
S
TO-220F
S
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
Drain Current-Continuous
-Pulsed
ID
IDM
Drain-Source Diode Forward Current
IS
Maximum Power Dissipation @Tc=25 C
Derate above 25 C
Operating and Storage Temperature Range
PD
TJ, TSTG
Limit
600
Ć30
5
15
5
50
0.38
-55 to 150
Unit
V
V
A
A
A
W
W/ C
C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
RįJC
RįJA
6-127
2.6
65
C/W
C/W
1 page  
15
VDS=480V
12 ID=9A
9
6
3
0
0 12 24 48 60 72 84 96 108
Qg, Total Gate Charge (nC)
Figure 9. Gate Charge
VDD
RL
VIN
D VOUT
VGS
RGEN G
S
Figure 11. Switching Test Circuit
CEF09N6
100
40
10 RDS(ON) Limit
D=0.01
1m1s00ij1s0ijt
1
VGS=20V
Tc=25 C
0.1 Single Pulse
1 10
100 500 1000
VDS, Drain-Source Voltage (V)
Figure 10. Maximum Safe
Operating Area
6
td(on)
VOUT
t on
tr
td(off)
90%
10% INVERTED
toff
tf
90%
10%
VIN
10%
50%
90%
50%
PULSE WIDTH
Figure 12. Switching Waveforms
2
1
D=0.5
0.2
0.1
0.1 0.05
0.02
0.01
Single Pulse
0.01
0.01
0.1
1 10 100
Square Wave Pulse Duration (msec)
PDM
t1
t2
1. RįJC (t)=r (t) * RįJC
2. RįJC=See Datasheet
3. TJM-TC = P* RįJC (t)
4. Duty Cycle, D=t1/t2
1000
10000
Figure 13. Normalized Thermal Transient Impedance Curve
6-131
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet CEF09N6.PDF ] | |
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