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PDF DS1961S Data sheet ( Hoja de datos )
| Número de pieza | DS1961S | |
| Descripción | 1kb Protected EEPROM iButton With SHA-1 Engine | |
| Fabricantes | Dallas Semiconducotr | |
| Logotipo |  |
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DS1961S
1kb Protected EEPROM iButton
With SHA-1 Engine
SPECIAL FEATURES
§ 1128 Bits of 5V EEPROM Memory
Partitioned into Four Pages of 256 Bits, a 64-
Bit Write-Only Secret, and up to Five
General-Purpose Read/Write Registers
§ Write Access Requires Knowledge of the
Secret and the Capability of Computing and
Transmitting a 160-Bit MAC (Message
Authentication Code) as Authorization
§ Secret and Data Memory can be Write-
Protected (All or Page 0 Only) or put in
EPROM-Emulation Mode (“Write to 0”, Page
1)
§ On-Chip, 512-Bit SHA-1 Engine to Compute
160-Bit MACs and Generate Secrets
§ Reads and Writes Over a Wide 2.8V to 5.25V
Voltage Range from -40°C to +85°C
§ Communicates to Host with a Single Digital
Signal at 14.1kbps using 1-Wire® Protocol
§ On-Chip, 16-Bit Cyclic Redundancy Check
(CRC) Generator for Safeguarding Data
Transfers
§ Overdrive Mode Boosts Communication
Speed to 125kbps
§ Operating Temperature Range from -40°C to
+85°C
§ Minimum 10 Years of Data Retention at
+85°C
§ Button Shape is Self-Aligning with Cup-
Shaped Probes
§ Durable Stainless-Steel Case Engraved with
Registration Number Withstands Harsh
Environments
§ Easily Affixed with Self-Stick Adhesive
Backing, Latched by its Flange, or Locked
with a Ring Pressed onto its Rim
§ Presence Detector Acknowledges when
Reader First Applies Voltage
§ Meets UL#913 (4th Edit.). Intrinsically Safe
Apparatus: Approved Under Entity Concept
for use in Class I, Division 1, Groups A, B, C,
and D Locations (Application Pending)
F5 MicroCan
5.89
0.36 0.51
© 1993
YYWW REGISTERED RR
xx 33
000000FBD8B3
16.25
17.35
IO
GND
F3 MicroCan
COMMON iButton FEATURES
§ Unique, Factory-Lasered and Tested 64-Bit
Registration Number (8-Bit Family Code +
48-Bit Serial Number + 8-Bit CRC Tester)
Assures Absolute Traceability Because No
Two Parts are Alike
§ Multidrop Controller for 1-Wire Net
§ Digital Identification and Information by
Momentary Contact
§ Chip-Based Data Carrier Compactly Stores
Information
§ Data can be Accessed While Affixed to
Object
iButton, 1-Wire, and MicroCan are registered trademarks of
Dallas Semiconductor.
0.36
3.10
0.51
© 1993
YYWW REGISTERED RR
xx 33
000000FBC52B
16.25
17.35
IO
GND
All dimensions are shown in millimeters.
1 of 36
092302
1 page  
Figure 4. 1-WIRE CRC GENERATOR
Polynomial = X8 + X5 + X4 + 1
DS1961S
1st 2nd 3rd 4th
STAGE STAGE STAGE STAGE
X0 X1 X2 X3
5th
STAGE
X4
6th 7th 8th
STAGE STAGE STAGE
X5 X6
X7
INPUT DATA
X8
MEMORY MAP
The DS1961S has four memory areas: data memory, secrets memory, register page with special function
registers and user-bytes, and a scratchpad. The data memory is organized in pages of 32 bytes. Secret,
register page, and scratchpad are 8 bytes each. The scratchpad acts as a buffer when writing to the data
memory, loading the initial secret or when writing to the register page.
Data memory, secrets memory, and the register page are located in a linear address space, as shown in
Figure 5. The data memory and the register page have unrestricted read access. Writing to the data
memory and the register page requires knowledge of the secret.
Figure 5. DS1961S MEMORY MAP
ADDRESS RANGE
0000h to 001Fh
0020h to 003Fh
0040h to 005Fh
0060h to 007Fh
0080h to 0087h
0088h 1)
0089h 1)
008Ah 1)
008Bh
008Ch 1)
008Dh 1)
008Eh to 008Fh
0090h to 0097h
DESCRIPTION
Data Memory Page 0
Data Memory Page 1
Data Memory Page 2
Data Memory Page 3
Secrets Memory
Write-Protect Secret, 008Ch to 008Fh
Write-Protect Pages 0 to 3
User Byte, Self-Protecting
Factory Byte (Read Only)
User Byte/EPROM Mode Control for
Page 1
User Byte/Write-Protect Page 0 Only
User Bytes/Manufacturer ID
64-Bit Identity Register
NOTE
No Write-Access Without Secret
No Write-Access Without Secret
No Write-Access Without Secret
No Write-Access Without Secret
No Read Access; No Secret Needed for
Write Access
Protection Activated by Code AAh or 55h
Protection Activated by Code AAh or 55h
Protection Activated by Code AAh or 55h
Reads Either AAh or 55h; See Text
Mode Activated by Code AAh or 55h
Protection Activated by Code AAh or 55h
Function Depends on Factory Byte
Read-Only Access
1) Once programmed to AAh or 55h this address becomes read-only. All other codes can be stored but
will neither write-protect the address nor activate any function.
5 of 36
5 Page 
DS1961S
Figure 7-2. MEMORY AND SHA FUNCTIONS FLOW CHART (continued)
From Figure 7
1st Part
AAh
Read Scratch-
Pad ?
N
Y
Bus Master RX
TA1 (T7:T0), TA2 (T15:T8)
and E/S Byte
DS1961S Sets Scratchpad
Byte Counter = 0
Bus Master RX
Data Byte from Scratchpad
DS1961S
Increments
Byte Counter
Master
TX Reset ?
Y
N
N
Byte Counter
=7?
Y
Bus Master RX CRC16
of Command, Address,
E/S Byte, Data Bytes as
Sent by the DS1961S
Bus Master
N
Master
RX “1”s
TX Reset ?
Y
To Figure 7
3rd Part
Note:
See the Read
Scratchpad
Description for
Additional
Information.
To Figure 7
1st Part
11 of 36
From Figure 7
3rd Part
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet DS1961S.PDF ] | |
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