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PDF IRLML5103 Data sheet ( Hoja de datos )
| Número de pieza | IRLML5103 | |
| Descripción | HEXFET Power MOSFET | |
| Fabricantes | International Rectifier | |
| Logotipo |  |
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l Generation V Technology
l Ultra Low On-Resistance
l P-Channel MOSFET
l SOT-23 Footprint
l Low Profile (<1.1mm)
l Available in Tape and Reel
l Fast Switching
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
A customized leadframe has been incorporated into the
standard SOT-23 package to produce a HEXFET Power
MOSFET with the industry's smallest footprint. This
package, dubbed the Micro3, is ideal for applications
where printed circuit board space is at a premium. The low
profile (<1.1mm) of the Micro3 allows it to fit easily into
extremely thin application environments such as portable
electronics and PCMCIA cards.
Absolute Maximum Ratings
ID @ TA = 25°C
ID @ TA = 70°C
IDM
PD @TA = 25°C
VGS
dv/dt
TJ, TSTG
Parameter
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery dv/dt
Junction and Storage Temperature Range
Thermal Resistance
Parameter
RθJA Maximum Junction-to-Ambient
PD - 91260E
IRLML5103
HEXFET® Power MOSFET
D
VDSS = -30V
G
RDS(on) = 0.60Ω
S
Micro3
Max.
-0.76
-0.61
-4.8
540
4.3
± 20
-5.0
-55 to + 150
Units
A
mW
mW/°C
V
V/ns
°C
Typ.
Max.
230
Units
°C/W
04/29/03
1 page  
-10V
QGS
VG
QG
QGD
Charge
Fig 9a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
12V .2µF
.3µF
D.U.T.
-
+VDS
VGS
-3mA
IG ID
Current Sampling Resistors
Fig 9b. Gate Charge Test Circuit
1000
IRLML5103
VDS
VGS
RG
RD
D.U.T.
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
-
+ VDD
Fig 10a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on) tr
td(off) tf
Fig 10b. Switching Time Waveforms
D = 0.50
100
0.20
0.10
0.05
10
0.02
0.01
1
0.1
0.00001
PDM
SINGLE PULSE
(THERMAL RESPONSE)
0.0001
0.001
t1
t2
Notes:
1. Duty factor D = t1 / t 2
2. Peak T J = P DM x Z thJA + TA
0.01 0.1
1
t1, Rectangular Pulse Duration (sec)
10
100
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet IRLML5103.PDF ] | |
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