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PDF M1010-01 Data sheet ( Hoja de datos )
| Número de pieza | M1010-01 | |
| Descripción | VCSO BASED CLOCK JITTER ATTENUATOR | |
| Fabricantes | ETC | |
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Integrated
Circuit
Systems, Inc.
Preliminary Information
M1010-01
VCSO BASED CLOCK JITTER ATTENUATOR
GENERAL DESCRIPTION
The M1010-01 is a VCSO (Voltage Controlled SAW
Oscillator) based clock jitter
attenuator PLL designed for clock
jitter attenuation and frequency
translation. The device is ideal for
generating the transmit reference
clock for OC-12 and OC-48 optical
network systems supporting 622 -
2,488 MHz rates. It can serve to jitter attenuate a
stratum reference clock or a recovered clock in loop
timing mode. The M1010-01 module includes a
proprietary SAW (surface acoustic wave) delay line as
part of the VCSO. This results in a high frequency,
high-Q, low phase noise oscillator that assures low
intrinsic output jitter.
PIN ASSIGNMENT (9 x 9 mm SMT)
FIN_SEL0
SEL0
SEL1
SEL2
NC
VCC
DNC
DNC
DNC
28 18
29 17
30 16
31 M 1 0 1 0 15
32 14
33 ( T o p V i e w )
34
13
12
35 11
36 10
VCC
NC
nFOUT
FOUT
GND
NC
NC
VCC
GND
FEATURES
◆ Ideal for OC-12/48 data clock
◆ Integrated SAW delay line
◆ Output frequencies from 150 to 175 MHz
(Specify VCSO output frequency at time of order)
◆ Low phase jitter of 0.5 ps rms, typical (12kHz to 20MHz)
◆ LVPECL clock output
◆ Pin-selectable feedback and reference divider ratios,
no programming required
◆ Scalable dividers provide further adjustment of loop
bandwidth as well as jitter tolerance
◆ Reference clock inputs support differential LVDS,
LVPECL, as well as single-ended LVCMOS, LVTTL
◆ Single 3.3V power supply
◆ Small 9 x 9 mm SMT (surface mount) package
SIMPLIFIED BLOCK DIAGRAM
Figure 1: Pin Assignment
Example I/O Clock Frequency Combinations
Using M1010-01-155.5200
Frequency
Input (Mfin)
Ratio
Input Reference
Clock
(MHz)
Output
Clock MHz
8 19.44
2
77.76
155.52
1 155.52
Table 1: Example I/O Clock Frequency Combinations
DIF_REF0
nDIF_REF0
DIF_REF1
nDIF_REF1
REF_SEL
M1010
0
1
R Div
Loop
Filter
M Div
Mfin Div
VCSO
3
SEL2:0
2
FIN_SEL1:0
Divider LUT
Mfin Divider
LUT
FOUT
nFOUT
Figure 2: Simplified Block Diagram
M1010-01 Datasheet Rev 0.4
Revised 29Sep2003
M1010-01 VCSO Based Clock Jitter Attenuator
Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400
1 page  
Integrated
Circuit
Systems, Inc.
M1010-01
VCSO BASED CLOCK JITTER ATTENUATOR
Preliminary Information
ABSOLUTE MAXIMUM RATINGS1
Symbol Parameter
Rating
Unit
VI Inputs
-0.5 to VCC +0.5
V
VO Outputs
-0.5 to VCC +0.5
V
VCC Power Supply Voltage
4.6 V
TS Storage Temperature
-45 to +100
oC
Table 6: Absolute Maximum Ratings
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional operation of product at these conditions
or any conditions beyond those listed in Recommended Conditions of Operation, DC Characteristics, or
AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability.
RECOMMENDED CONDITIONS OF OPERATION
Symbol Parameter
Min Typ Max Unit
VCC Positive Supply Voltage
3.135 3.3 3.465 V
TA Ambient Operating Temperature
Commercial
0
+70 oC
Industrial
-40
+85 oC
Table 7: Recommended Conditions of Operation
M1010-01 Datasheet Rev 0.4
5 of 8
Revised 29Sep2003
Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet M1010-01.PDF ] | |
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