PDF KMM372C213CK Data sheet ( Hoja de datos )

Número de pieza	KMM372C213CK
Descripción	DRAM Module
Fabricantes	Samsung Semiconductor
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No Preview Available ! DRAM MODULE KMM372C213CK/CS KMM372C213CK/CS Fast Page Mode 2M x 72 DRAM DIMM with ECC using 2Mx8, 2K Refresh , 5V GENERAL DESCRIPTION The Samsung KMM372C213C is a 2Mx72bits Dynamic RAM high density memory module. The Samsung KMM372C213C consists of nine CMOS 2Mx8bits DRAMs in SOJ/TSOP-II 300mil package, and two 16bits driver IC in 48pin TSSOP package mounted on a 168-pin glass-epoxy substrate. A 0.1 or 0.22uF decoupling capacitor is mounted on the printed cir- cuit board for each DRAM. The KMM372C213C is a Dual In- line Memory Module and is intended for mounting into 168 pin edge connector sockets. PERFORMANCE RANGE Speed -5 tRAC 50ns tCAC 18ns tRC 90ns tPC 35ns -6 60ns 20ns 110ns 40ns FEATURES • Part Identification - KMM372C213CK (2048 cycles/32ms Ref. 300mil SOJ) - KMM372C213CS (2048 cycles/32ms Ref. 300mil TSOP) • Fast Page Mode Operation • CAS-before-RAS Refresh capability • RAS-only and Hidden refresh capability • TTL compatible inputs and outputs • Single 5V±10% power supply • JEDEC standard pinout & Buffered PDpin • Buffered input except RAS and DQ • PCB : Height(1000mil), single sided component PIN CONFIGURATIONS PIN NAMES Pin Front Pin Front Pin Front Pin Back Pin Back Pin Back Pin Names Function 1 VSS 29 RSVD 57 DQ22 85 VSS 113 RSVD 141 DQ58 2 DQ0 30 RAS0 58 DQ23 86 DQ36 114 RAS1 142 DQ59 3 DQ1 31 OE0 59 VCC 87 DQ37 115 RFU 143 VCC 4 DQ2 32 VSS 60 DQ24 88 DQ38 116 VSS 144 DQ60 5 DQ3 33 A0 61 RFU 89 DQ39 117 A1 145 RFU 6 VCC 34 A2 62 RFU 90 VCC 118 A3 146 RFU 7 DQ4 35 A4 63 RFU 91 DQ40 119 A5 147 RFU 8 DQ5 36 A6 64 RFU 92 DQ41 120 A7 148 RFU 9 DQ6 37 A8 65 DQ25 93 DQ42 121 A9 149 DQ61 10 DQ7 38 A10 66 DQ26 94 DQ43 122 A11 150 DQ62 11 DQ8 39 A12 67 DQ27 95 DQ44 123 A13 151 DQ63 12 VSS 40 VCC 68 VSS 96 VSS 124 VCC 152 VSS 13 DQ9 41 RFU 69 DQ28 97 DQ45 125 RFU 153 DQ64 14 DQ10 42 RFU 70 DQ29 98 DQ46 126 B0 154 DQ65 15 DQ11 43 VSS 71 DQ30 99 DQ47 127 VSS 155 DQ66 16 DQ12 44 OE2 72 DQ31 100 DQ48 128 RFU 156 DQ67 17 DQ13 45 RAS2 73 VCC 101 DQ49 129 RAS3 157 VCC 18 VCC 46 CAS4 74 DQ32 102 VCC 130 CAS5 158 DQ68 19 DQ14 47 RSVD 75 DQ33 103 DQ50 131 RSVD 159 DQ69 20 DQ15 48 W2 76 DQ34 104 DQ51 132 PDE 160 DQ70 21 DQ16 49 VCC 77 DQ35 105 DQ52 133 VCC 161 DQ71 22 DQ17 50 RSVD 78 VSS 106 DQ53 134 RSVD 162 VSS 23 VSS 51 RSVD 79 PD1 107 VSS 135 RSVD 163 PD2 24 RSVD 52 DQ18 80 PD3 108 RSVD 136 DQ54 164 PD4 25 RSVD 53 DQ19 81 PD5 109 RSVD 137 DQ55 165 PD6 26 VCC 54 VSS 82 PD7 110 VCC 138 VSS 166 PD8 27 W0 55 DQ20 83 ID0 111 RFU 139 DQ56 167 ID1 28 CAS0 56 DQ21 84 VCC 112 CAS1 140 DQ57 168 VCC A0, B0, A1 - A10 Address Input DQ0 - DQ71 Data In/Out W0, W2 Read/Write Enable OE0, OE2 Output Enable RAS0 , RAS2 Row Address Strobe CAS0 , CAS7 Column Address Strobe VCC Power(+5V) VSS Ground NC No Connection PDE Presence Detect Enable PD1 - 8 Presence Detect ID0 - 1 ID bit RSVD Reserved Use RFU Reserved for Future Use Pins marked ′′ are not used in this module. PD & ID Table Pin 50NS PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 1 0 0 1 0 0 0 0 60NS 1 0 0 1 0 1 1 0 PD Note : PD & ID Terminals must each be pulled up through a resister to V CC at the next higher ID0 0 level assembly. PDs will be either open (NC) or driven to V SS via on-board buffer circuits. PD : 0 for Vol of Drive IC & 1 for N.C ID Note : IDs will be either open (NC) or connected directly to V SS without a buffer. ID : 0 for Vss & 1 for N.C 0 1 page DRAM MODULE KMM372C213CK/CS AC CHARACTERISTICS (0°C≤TA≤70°C, VCC=5.0V±10%. See notes 1,2.) Test condition : Vih/Vil=2.4/0.8V, Voh/Vol=2.4/0.4V, Output loading CL=100pF Parameter Symbol RAS to W delay time CAS setup time(CAS-before-RAS refresh) CAS hold time(CAS-before-RAS refresh) RAS precharge to CAS hold time Access time from CAS precharge Fast page mode cycle time Fast page mode read-modify-write cycle time CAS precharge time(Fast page cycle) RAS pulse width (Fast page cycle) RAS hold time from CAS precharge W to RAS precharge time (C-B-R refresh) W to RAS hold time (C-B-R refresh) OE access time OE to data delay Output buffer turn off delay time from OE OE command hold time tRWD tCSR tCHR tRPC tCPA tPC tPRWC tCP tRASP tRHCP tWRP tWRH tOEA tOED tOEZ tOEH -5 Min Max 71 10 8 3 35 35 75 10 50 200K 35 15 8 18 18 5 18 13 -6 Min Max 83 10 8 3 40 40 80 10 60 200K 40 15 8 20 20 5 20 15 Present Detect Read Cycle PDE to Valid PD bit PDE to PD bit Inactive tPD 10 10 tPDOFF 2 7 2 7 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns Note 7,11 11 11 11 3,11 11 11 11 11 11 11 ns ns 5 Page DRAM MODULE FAST PAGE READ CYCLE NOTE : DOUT = OPEN KMM372C213CK/CS VIH - RAS VIL - VIH - CAS VIL - VIH - A VIL - VIH - W VIL - VIH - OE VIL - VOH - DQ VOL - tRASP tRHCP ¡ó tCRP tRCD tCAS tPC tCP tCAS tASR tRAD tASC tRAH tCSH tCAH tASC ¡ó tCAH ROW COLUMN COLUMN ADDR ADDRESS ADDRESS tCP tRSH tCAS tASC tCAH ¡ó COLUMN ADDRESS ¡ó tRCS tRCH tRCS ¡ó tRCS tRP tRRH tRCH tCAC tOEA tCAC tOEA ¡ó tCAC tOEA tAA tRAC tCLZ tAA tOFF tOEZ tCLZ VALID DATA-OUT ¡ó tAA tOFF tOEZ tCLZ VALID DATA-OUT tOFF tOEZ VALID DATA-OUT Don′t care Undefined 11 Page

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