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PDF T83C51SND1 Data sheet ( Hoja de datos )
| Número de pieza | T83C51SND1 | |
| Descripción | Single Chip Microcontroller | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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1. Features
• MPEGI/II-Layer 3 Hardwired Decoder
– Stand-alone MP3 decoder
– 48, 44.1, 32, 24, 22.05, 16 KHz sampling freq.
– Separated digital volume control on left and right channels (software control using
31 steps)
– Bass, medium, and Treble Control (31 steps)
– Bass Boost sound effect.
– Ancillary data extraction
– “CRC Error” and “MPEG Frame Synchronization” indicators
• Programmable Audio Output for interfacing with common audio DAC available on the
market
– PCM format compatible
– I2S format compatible
• 8-bit MCU C51 core based (FMAX= 20 MHz)
• 2304 bytes of Internal RAM
• 64 Kbytes of Code Memory
– FLASH: T89C51SND1, ROM: T83C51SND1
• 4 Kbytes of Boot Flash Memory (T89C51SND1)
– ISP: download from USB or UART to any external memory cards
• USB Rev 1.1 controller
– “Full speed” data transmission
• Built-in PLL
– MP3 Audio clocks
– USB clock
• MultiMediaCard Interface Compatibility
• Atmel DataFlash SPI Interface Compatibility
• IDE/ATAPI Interface
• 2 Channels 10-bit ADC, 8KHz (8 true bit)
– Battery voltage Monitoring
– Voice recording controlled by software
• Up to 44 bits of General Purpose I/Os for:
– 4-bit interrupt keyboard port for a 4 x n matrix
– Smartmedia software interface
• Standard Two 16-bit Timers/Counters
• Hardware Watchdog Timer
• Standard Full Duplex UART with Baud Rate Generator
• 2-wire Master and Slave Modes Controller
• SPI Master and Slave Modes Controller
• Power Management
– Power-On reset
– Software programmable MCU clock
– Idle mode, Power-Down mode
• Operating conditions:
– 3V, ±10%, 25 mA typical operating at 25°C
– -40°C to +85°C
• Packages
– TQFP80, PLCC84 (development board)
– Dice
Single Chip
Microcontroller
with MP3
Decoder and
Man Machine
Interface
T8xC51SND1
Rev. D – 15-Nov-01
1
1 page  
Rev. D – 15-Nov-01
T8xC51SND1
Signal
Name
P2.7:0
Type
Description
I/O
Port 2
P2 is an 8-bit bidirectional I/O port with internal pull-ups.
P3.7:0
I/O
Port 3
P3 is an 8-bit bidirectional I/O port with internal pull-ups.
P4.7:0
I/O
Port 4
P4 is an 8-bit bidirectional I/O port with internal pull-ups.
P5.3:0
I/O
Port 5
P5 is a 4-bit bidirectional I/O port with internal pull-ups.
Alternate
Function
A15:8
RXD
TXD
INT0#
INT1#
T0
T1
WR#
RD#
MISO
MOSI
SCK
SS#
-
Table 2. Clock Signal Description
Signal
Name
Type
Description
Alternate
Function
X1
X2
FILT
Input to the on-chip inverting oscillator amplifier
I
To use the internal oscillator, a crystal/resonator circuit is connected to
this pin. If an external oscillator is used, its output is connected to this
pin. X1 is the clock source for internal timing.
Output of the on-chip inverting oscillator amplifier
O To use the internal oscillator, a crystal/resonator circuit is connected to
this pin. If an external oscillator is used, leave X2 unconnected.
I
PLL Low Pass Filter input
FILT receives the RC network of the PLL low pass filter.
-
-
-
Table 3. Timer 0 and Timer 1 Signal Description
Signal
Name
Type
Description
Alternate
Function
INT0#
Timer 0 Gate Input
INT0# serves as external run control for timer 0, when selected by
GATE0 bit in TCON register.
I External Interrupt 0
INT0# input sets IE0 in the TCON register. If bit IT0 in this register is
set, bit IE0 is set by a falling edge on INT0#. If bit IT0 is cleared, bit IE0
is set by a low level on INT0#.
P3.2
INT1#
Timer 1 Gate Input
INT1# serves as external run control for timer 1, when selected by
GATE1 bit in TCON register.
I External Interrupt 1
INT1# input sets IE1 in the TCON register. If bit IT1 in this register is
set, bit IE1 is set by a falling edge on INT1#. If bit IT1 is cleared, bit IE1
is set by a low level on INT1#.
P3.3
5
5 Page 
T8xC51SND1
5. Block Diagram
Figure 3. T8xC51SND1 Block Diagram
INT0# INT1# VDD VSS UVDD UVSS AVDD AVSS AREF AIN1:0 TXD RXD T0
33
33 3
T1 SS# MISO MOSI SCK SCL SDA
3 44 4 4 1 1
Interrupt
Handler Unit
RAM
2304 bytes
FLASH
ROM
64 Kbytes
FLASH Boot
4 Kbytes
10-bit A to D
Converter
UART
&
BRG
Timers 0/1 SPI / DataFlash
Watchdog
Controller
2-wire
Controller
C51 (X2 CORE)
8-BIT INTERNAL BUS
Clock & PLL
Unit
MP3 Decoder
Unit
I2S / PCM
Audio Interface
USB
Controller
MMC
Interface
Keyboard
Interface
I/O
Ports
IDE
Interface
FILT X1 X2 RST
ISP# ALE
1 Alternate function of Port 1
3 Alternate function of Port 3
4 Alternate function of Port 4
DOUT DCLK DSEL SCLK D+ D-
MCLK MDAT MCMD
1
KIN3:0
P0-P5
Rev. D – 15-Nov-01
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet T83C51SND1.PDF ] | |
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