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PDF ICS9248-92 Data sheet ( Hoja de datos )

Número de pieza ICS9248-92
Descripción Frequency Generator & Integrated Buffers
Fabricantes Integrated Circuit Systems 
Logotipo Integrated Circuit Systems Logotipo



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No Preview Available ! ICS9248-92 Hoja de datos, Descripción, Manual

Integrated
Circuit
Systems, Inc.
ICS9248-92
Mobile Pentium IITM System Clock Chip
RecommendedApplication:
The ICS9248-92 is a fully compliant timing solution for the
Intel mobile 440BX/MX chipset requirements.
General Description:
Features include two strong CPU, seven PCI and eight SDRAM
clocks. Three reference outputs are available equal to the
crystal frequency. Stronger drive CPUCLK outputs typically
provide greater than 1 V/ns slew rate into 20pF loads. This
device meets rise and fall requirements with 2 loads per CPU
output (ie, one clock to CPU and NB chipset, one clock to two
L2 cache inputs).
PWR_DWN# pin allows low power mode by stopping crystal
OSC and PLL stages. For optional power management,
CPU_STOP# can stop CPU (0:1) clocks and PCI_STOP# will
stop PCICLK (0:5) clocks
PCICLK outputs typically provide better than 1V/ns slew rate
into 30pF loads while maintaining 50±5% duty cycle. The REF
clock outputs typically provide better than 0.5V/ns slew rates.
The ICS9248-92 accepts a 14.318MHz reference crystal or
clock as its input and runs on a 3.3V core supply.
Features
• Generates system clocks for CPU, SDRAM, PCI, plus
14.318 MHz REF(0:2), USB, Plus Super I/O
• I2C serial configuration interface provides output clock
disabling and other functions
• MODE input pin selects optional power management
input control pins
• Two fixed outputs separately selectable as 24 or 48MHz
• 2.5V outputs: CPU
• 3.3V outputs: SDRAM, PCI, REF, 48/24 MHz
• No power supply sequence requirements
• Uses external 14.318MHz crystal
• 48 pin 240 mil TSSOP package
• Output enable register
for serial port control:
1 = enable
0 = disable
Block Diagram
Pin Configuration
Pentium is a trademark on Intel Corporation.
9248-92 Rev E 02/21/01
48-Pin TSSOP 240 mil Package
Functionality
Crystal (X1, X2) = 14.31818 MHz
SEL
100/66#
0
1
CPUCLK
(MHz)
66.6
100
PCICLK
(MHz)
33.3
33.3
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.

1 page




ICS9248-92 pdf
ICS9248-92
Serial Configuration Command Bitmaps
Byte 0: Functional and Frequency Select Clock Register (default on Bits 7, 6, 5, 4, 1, 0 = 0)
Note: PWD = Power-Up Default
(default on Bits 3, 2 = 1)
BIT
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PIN#
-
-
-
23
22
-
DESCRIPTION
Reserved
Reserved
In Spread Spectrum, Controls type
(0=centered, 1=down spread)
In Spread Spectrum, Controls Spreading
(0=±0.5% 1=±0.25%)
48/24 MHz (Frequency Select) 1=48 MHz, 0=24 MHz
48/24 MHz (Frequency Select) 1=48 MHz, 0=24 MHz
Bit1 Bit0
1 1 - Tri-State
1 0 - Spread Spectrum Enable
0 1 - Testmode
0 0 - Normal operation
PWD
0
0
1
0
1
1
10
Select Functions
Functionality
Tristate
Testmode
CPU
HI - Z
TCLK/21
PCI,
PCI_F
HI - Z
TCLK/41
SDRAM
HI - Z
TCLK/21
REF
HI - Z
TCLK1
24 MHz
Selection
HI - Z
TCLK/41
48 MHz
Selection
HI - Z
TCLK/21
Notes:
1. TCLK is a test clock driven on the X1 (crystal in pin) input during test mode.
5

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ICS9248-92 arduino
ICS9248-92
Electrical Characteristics - CPUCLK
TA = 0 - 70º C; VDD = 3.3 V +/-5%, VDDL = 2.5 V +/-5%; CL = 20 pF (unless otherwise stated)
PARAMETER
SYM B OL
CONDITIONS
M IN
TYP
Period
period(norm) VT = 1.25 V; 100MHz 10 10
Output High Voltage
VOH2 B
IOH = -12.0 mA
1.8 2.3
Output Low Voltage
VOL2 B
IOL = 12 mA
0.31
Output High Current
IOH2 B
VOH = 1.7 V
Output Low Current
Rise Time
Fall Time
Duty Cycle
Skew
Jitter
IOL2 B
tr2
1
B
tf2
1
B
dt2
1
B
tsk
2
1
B
t
1
cy c-cy c
VOL = 0.7 V
VOL = 0.4 V, VOH = 2.0 V
VOH = 2.0 V, VOL = 0.4 V
VT = 1.25 V
VT = 1.25 V
VT = 1.25 V
27
45
1
50
30
186
MAX
10.5
0.4
-27
1.6
1.6
55
95
250
1Guaranteed by design, not 100% tested in production.
UNITS
ns
V
V
mA
mA
ns
ns
%
ps
ps
Electrical Characteristics - REF, 48MHz,24MHz
TA = 0 - 70º C; VDD = 3.3 V +/-5%, VDDL = 2.5 V +/-5%; CL = 20 pF (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Output High Voltage
Output Low Voltage
Output High Current
Output Low Current
Rise Time1
Fall Time1
Duty Cycle1
Jitter, Absolute1
Jitter, Absolute1
VOH5
VOL5
IOH5
IOL5
tr5
tf5
dt5
tjabs5
tjabs5
IOH = -14 mA
IOL = 6.0 mA
VOH = 2.0 V
VOL = 0.8 V
VOL = 0.4 V, VOH = 2.4 V
VOH = 2.4 V, VOL = 0.4 V
VT = 1.5 V
VT = 1.5 V, REF
VT = 1.5 V, 48 MHz
2 3.21
V
0.21 0.4
V
-23 mA
29 mA
1 2.5 4 ns
1 2.5 4 ns
45 52 55 %
385 800 ps
469 800 ps
1Guaranteed by design, not 100% tested in production.
11

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