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PDF ICS9248-98 Data sheet ( Hoja de datos )

Número de pieza ICS9248-98
Descripción Frequency Generator & Integrated Buffers
Fabricantes Integrated Circuit Systems 
Logotipo Integrated Circuit Systems Logotipo



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Integrated
Circuit
Systems, Inc.
ICS9248-98
Frequency Generator & Integrated Buffers for Celeron & PII/III
Recommended Application:
440BX/VIA Apollo 133 style chipset.
Output Features:
• 2 - CPUs @2.5V, up to 166MHz.
• 1 - IOAPIC @ 2.5V
• 13 - SDRAM @ 3.3V
• 6 - PCI @3.3V,
• 1 - 48MHz, @3.3V fixed.
• 1 - 24MHz @ 3.3V
• 2 - REF @3.3V, 14.318MHz.
Features:
• Up to 166MHz frequency support
• Support power management: PCI, CPU stop and Mode
• Spread spectrum for EMI control (0 to -0.5%, ± 0.25%).
• Uses external 14.318MHz crystal
Skew Specifications:
• CPU – CPU: <175ps
• SDRAM - SDRAM: <250ps
• PCI – PCI: <500ps
• BUFFER_IN-SDRAM: <5ns
• CPU(early)-PCI: Min=1.0ns, Typ=2.3ns, Max=4.0ns
Pin Configuration
VDD1
*PCI_STOP/REF0
GND
X1
X2
VDD2
*MODE/PCICLK_F
**FS3/PCICLK0
GND
PCICLK1
PCICLK2
PCICLK3
PCICLK4
VDD2
BUFFER IN
GND
SDRAM11
SDRAM10
VDD3
SDRAM9
SDRAM8
GND
SDATA
SCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48 VDDL1
47 IOAPIC
46 REF1/FS2*
45 GND
44 CPUCLK_F
43 CPUCLK1
42 VDDL2
41 CLK_STOP#*
40 SDRAM_F
39 GND
38 SDRAM0
37 SDRAM1
36 VDD3
35 SDRAM2
34 SDRAM3
33 GND
32 SDRAM4
31 SDRAM5
30 VDD3
29 SDRAM6
28 SDRAM7
27 VDD4
26 48MHz/FS0*
25 24MHz/FS1*
48-Pin 300mil SSOP
* Internal Pull-up Resistor of 120K to VDD
** Internal Pull-down resistor of 120K to GND
Block Diagram
X1
X2
BUFFER IN
FS(3:0) 4
MODE
CLK_STOP#
PCI_STOP#
SDATA
SCLK
PLL2
XTAL
OSC
/2
STOP
PLL1
Spread
Spectrum
LATCH
POR
4
Control
Logic
Config.
Reg.
STOP
STOP
PCI
CLOCK
DIVDER
STOP
48MHz
24MHz
IOAPIC
2 REF(1:0)
CPUCLK_F
CPUCLK 1
12 SDRAM (11:0)
SDRAM_F
PCICLK (4:0)
5
PCICLKF
Functionality
FS3 FS2 FS1 FS0
0000
000 1
00 10
00 11
0 100
0 10 1
0 110
0 111
10 0 0
100 1
10 10
10 11
1 10 0
110 1
1 1 10
1111
CPU
(MHz)
80.00
75.00
83.31
66.82
103.00
112.01
68.01
100.23
120.00
114.99
109.99
105.00
140.00
150.00
124.00
132.99
PCICLK
(MHz)
40.00
37.50
41.65
33.41
34.33
37.34
34.01
33.41
40.00
38.33
36.66
35.00
35.00
37.50
31.00
33.25
9248-98 Rev D 11/6/00
Third party brands and names are the property of their respective owners.
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any
information being relied upon by the customer is current and accurate.

1 page




ICS9248-98 pdf
ICS9248-98
Serial Configuration Command Bitmap
Byte0: Functionality and Frequency Select Register (default = 0)
Bit
Bit 2,
Bit 7:4
Bit 3
Bit 1
Bit 0
Description
Bit (2, 7, 6, 5, 4)
CPUCLK
(MHz)
PCICLK
(MHz)
00000
80.00
40.00
0000 1
75.00
37.50
000 10
83.31
41.65
000 11
66.82
33.41
00 100
103.00
34.33
00 10 1
112.01
37.34
00 110
68.01
34.01
00 111
100.23
33.41
0 1000
120.00
40.00
0 100 1
114.99
38.33
0 10 10
109.99
36.66
0 10 11
105.00
35.00
0 1100
140.00
35.00
0 110 1
150.00
37.50
0 1110
124.00
31.00
0 1111
132.99
33.25
10 0 0 0
135.00
33.75
1000 1
129.99
32.50
100 10
126.00
31.50
100 11
118.00
39.33
10 100
115.98
38.66
10 10 1
95.00
31.67
10 110
90.00
30.00
10 111
85.01
28.34
1 10 0 0
166.00
41.50
1100 1
160.01
40.00
110 10
154.99
38.75
110 11
147.95
36.99
1 1 10 0
145.98
36.50
1110 1
143.98
35.99
1 1 1 10
141.99
35.50
11111
138.01
34.50
0 - Frequency is selected by hardware select, Latched Inputs
1 - Frequency is selected by Bit 2, 7:4
0 - Normal
1 - Spread Spectrum Enabled ± 0.25% Center Spread
0 - Running
1- Tristate all outputs
PWD
0,0101
Note1
0
1
0
Note1: Default at power-up will be for latched logic inputs to define frequency, as displayed by Bit 3.
Third party brands and names are the property of their respective owners.
5

5 Page





ICS9248-98 arduino
ICS9248-98
Electrical Characteristics - CPUCLK
TA = 0 - 70C; VDD=3.3V +/- 5%, VDDL=2.5V +/- 5%; CL = 20 pF (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
Output High Voltage
Output Low Voltage
Output High Current
Output Low Current
Rise Time1
Fall Time1
Duty Cycle1
Skew window1
Jitter, Cycle-to-cycle1
VOH2B
VOL2B
IOH2B
IOL2B
tr2B
tf2B
dt2B
tsk2B
tjcyc-cyc2B
IOH = -8 mA
IOL = 12 mA
VOH = 1.7 V
VOL = 0.7 V
VOL = 0.4 V, VOH = 2.0 V
VOH = 2.0 V, VOL = 0.4 V
VT = 1.25 V
VT = 1.25 V
VT = 1.25 V
2 2.4
V
0.17 0.4 V
-58 -16 mA
19 46
mA
1.08 1.6 ns
0.96 1.6 ns
45 49.4 55
%
62 175 ps
216 250 ps
1Guaranteed by design, not 100% tested in production.
Electrical Characteristics - PCICLK
TA = 0 - 70C; VDD = 3.3V +/-5%, VDDL = 2.5V +/-5%; CL = 30 pF (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
Output High Voltage
Output Low Voltage
Output High Current
Output Low Current
Rise Time1
Fall Time1
Duty Cycle1
Skew window1
Jitter, Absolute1
VOH1
VOL1
IOH1
IOL1
tr1
tf1
dt1
tsk1
tjabs1
IOH = -11 mA
IOL = 9.4 mA
VOH = 2.0 V
VOL = 0.8 V
VOL = 0.4 V, VOH = 2.4 V
VOH = 2.4 V, VOL = 0.4 V
VT = 1.5 V
VT = 1.5 V
VT = 1.5 V
2.4
41
45
-500
1Guaranteed by design, not 100% tested in production.
TYP MAX UNITS
3.15 V
0.13 0.4
V
-97 -40 mA
69 mA
1.42 2.0 ns
1.35 2.0 ns
51 55 %
251 500 ps
180 500 ps
Third party brands and names are the property of their respective owners.
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