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PDF M464S3254DTS Data sheet ( Hoja de datos )

Número de pieza M464S3254DTS
Descripción 32Mx64 SDRAM SODIMM based on 16Mx16 / 4Banks / 8K Refresh / 3.3V Synchronous DRAMs with SPD
Fabricantes Samsung semiconductor 
Logotipo Samsung semiconductor Logotipo



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M464S3254DTS
PC133/PC100 SODIMM
M464S3254DTS SDRAM SODIMM
32Mx64 SDRAM SODIMM based on 16Mx16, 4Banks, 8K Refresh,3.3V Synchronous DRAMs with SPD
GENERAL DESCRIPTION
The Samsung M464S3254DTS is a 32M bit x 64 Synchronous
Dynamic RAM high density memory module. The Samsung
M464S3254DTS consists of eight CMOS 16M x 16 bit with
4banks Synchronous DRAMs in TSOP-II 400mil package and a
2K EEPROM in 8-pin TSSOP package on a 144-pin glass-epoxy
substrate. Three 0.1uF decoupling capacitors are mounted on
the printed circuit board in parallel for each SDRAM. The
M464S3254DTS is a Small Outline Dual In-line Memory Module
and is intended for mounting into 144-pin edge connector sock-
ets.
Synchronous design allows precise cycle control with the use of
system clock. I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable latencies allows
the same device to be useful for a variety of high bandwidth,
high performance memory system applications.
FEATURE
• Performance range
Part No.
M464S3254DTS-L7C/C7C
M464S3254DTS-L7A/C7A
M464S3254DTS-L1H/C1H
M464S3254DTS-L1L/C1L
Max Freq. (Speed)
133MHz@CL=2
133MHz@CL=3
100MHz @ CL=2
100MHz @ CL=3
• Burst mode operation
• Auto & self refresh capability (8192 Cycles/64ms)
• LVTTL compatible inputs and outputs
• Single 3.3V ± 0.3V power supply
• MRS cycle with address key programs
Latency (Access from column address)
Burst length (1, 2, 4, 8 & Full page)
Data scramble (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the
system clock
• Serial presence detect with EEPROM
• PCB : Height (1,250mil), double sided component
PIN CONFIGURATIONS (Front side/back side)
Pin Front Pin Back Pin Front Pin Back Pin Front Pin Back
1 VSS 2 VSS 51 DQ14 52 DQ46 95 DQ21 96 DQ53
3 DQ0 4 DQ32 53 DQ15 54 DQ47 97 DQ22 98 DQ54
5 DQ1 6 DQ33 55 VSS 56 VSS 99 DQ23 100 DQ55
7 DQ2 8 DQ34 57 NC 58 NC 101 VDD 102 VDD
9 DQ3 10 DQ35 59 NC 60 NC 103 A6 104 A7
11 VDD 12 VDD
13 DQ4 14 DQ36
Voltage Key
105 A8 106 BA0
107 VSS 108 VSS
15 DQ5 16 DQ37
109 A9 110 BA1
17 DQ6 18 DQ38 61 CLK0 62 CKE0 111 A10/AP 112 A11
19 DQ7 20 DQ39 63 VDD 64 VDD 113 VDD 114 VDD
21 VSS 22 VSS 65 RAS 66 CAS 115 DQM2 116 DQM6
23 DQM0 24 DQM4 67 WE 68 CKE1 117 DQM3 118 DQM7
25 DQM1 26 DQM5 69 CS0 70 A12 119 VSS 120 VSS
27 VDD 28 VDD 71 CS1 72 *A13 121 DQ24 122 DQ56
29 A0 30 A3 73 DU 74 CLK1 123 DQ25 124 DQ57
31 A1 32 A4 75 VSS 76 VSS 125 DQ26 126 DQ58
33 A2 34 A5 77 NC 78 NC 127 DQ27 128 DQ59
35 VSS 36 VSS 79 NC 80 NC 129 VDD 130 VDD
37 DQ8 38 DQ40 81 VDD 82 VDD 131 DQ28 132 DQ60
39 DQ9 40 DQ41 83 DQ16 84 DQ48 133 DQ29 134 DQ61
41 DQ10 42 DQ42 85 DQ17 86 DQ49 135 DQ30 136 DQ62
43 DQ11 44 DQ43 87 DQ18 88 DQ50 137 DQ31 138 DQ63
45 VDD 46 VDD 89 DQ19 90 DQ51 139 VSS 140 VSS
47 DQ12 48 DQ44 91 VSS 92 VSS 141 **SDA 142 **SCL
49 DQ13 50 DQ45 93 DQ20 94 DQ52 143 VDD 144 VDD
PIN NAMES
Pin Name
Function
A0 ~ A12
Address input (Multiplexed)
BA0 ~ BA1 Select bank
DQ0 ~ DQ63 Data input/output
CLK0 ~ CLK1 Clock input
CKE0 ~ CKE1 Clock enable input
CS0 ~ CS1 Chip select input
RAS
Row address strobe
CAS
Column address strobe
WE Write enable
DQM0 ~ 7
DQM
VDD Power supply (3.3V)
VSS Ground
SDA
Serial data I/O
SCL Serial clock
DU Dont use
NC No connection
* These pins are not used in this module.
** These pins should be NC in the system
which does not support SPD.
SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.
Rev. 0.0 Jan. 2002

1 page




M464S3254DTS pdf
M464S3254DTS
PC133/PC100 SODIMM
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, TA = 0 to 70°C)
Parameter
Operating current
(One bank active)
Symbol
Test Condition
Burst length = 1
ICC1 tRC tRC(min)
IO = 0 mA
Version
Unit Note
-7C -7A -1H -1L
560 520 520 520 mA 1
Precharge standby cur-
rent in power-down mode
ICC2P
ICC2PS
CKE VIL(max), tCC = 10ns
CKE & CLK VIL(max), tCC =
16
mA
16
Precharge standby cur-
ICC2N
CKE VIH(min), CS VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
160
rent in non power-down
mA
mode
ICC2NS
CKE VIH(min), CLK VIL(max), tCC =
Input signals are stable
80
Active standby current in
power-down mode
ICC3P
ICC3PS
CKE VIL(max), tCC = 10ns
CKE & CLK VIL(max), tCC =
48
mA
48
Active standby current in
ICC3N
CKE VIH(min), CS VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
240
mA
non power-down mode
(One bank active)
ICC3NS CKE VIH(min), CLK VIL(max), tCC =
Input signals are stable
200 mA
Operating current
(Burst mode)
Refresh current
Self refresh current
IO = 0 mA
ICC4 Page burst
4banks Activated.
tCCD = 2CLKs
ICC5 tRC tRC(min)
ICC6 CKE 0.2V
680 680 640 640 mA 1
1000 920 880 880 mA 2
C 24 mA
L 12 mA
Notes :
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noticed, input swing level is CMOS(VIH/VIL=VDDQ/VSSQ).
Rev. 0.0 Jan. 2002

5 Page





M464S3254DTS arduino
M464S3254DTS
PC133/PC100 SODIMM
SERIAL PRESENCE DETECT INFORMATION
Byte #
Function described
Function Supported
Hex value
Note
-7C -7A -1H -1L -7C -7A -1H -1L
35 Data signal input hold time
0.8ns 0.8ns 1ns 1ns 08h 08h 10h 10h
36~61 Superset information (maybe used in future)
- 00h
62 SPD data revision code
Current release Intel spd 1.2B/A
12h
63 Checksum for bytes 0 ~ 62
- 79h BAh 21h 51h
64 Manufacturer JEDEC ID code
Samsung
CEh
65~71 ...... Manufacturer JEDEC ID code
Samsung
00h
72 Manufacturing location
Onyang Korea
01h
73 Manufacturer part # (Memory module)
M 4Dh
74 Manufacturer part # (DIMM configuration)
4 34h
75 Manufacturer part # (Data bits)
Blank
20h
76 ...... Manufacturer part # (Data bits)
6 36h
77 ...... Manufacturer part # (Data bits)
4 34h
78 Manufacturer part # (Mode & operating voltage)
S
53h
79 Manufacturer part # (Module depth)
3 33h
80 ...... Manufacturer part # (Module depth)
2 32h
81 Manufacturer part # (Refresh, # of banks in Comp. & inter-
5
35h
82 Manufacturer part # (Composition component)
4
34h
83 Manufacturer part # (Component revision)
D 44h
84 Manufacturer part # (Package type)
T 54h
85 Manufacturer part # (PCB revision & type)
S 53h
86 Manufacturer part # (Hyphen)
" - " 2Dh
87 Manufacturer part # (Power)
L/C
4Ch / 43h
88 Manufacturer part # (Minimum cycle time)
7 7 1 1 37h 37h 31h 31h
89 Manufacturer part # (Minimum cycle time)
C A H L 43h 41h 48h 4Ch
90 Manufacturer part # (TBD)
Blank
20h
91 Manufacturer revision code (For PCB)
S 53h
92 ...... Manufacturer revision code (For component)
D-die (5th Gen.)
44h
93 Manufacturing date (Year)
- -3
94 Manufacturing date (Week)
- -3
95~98 Assembly serial #
- -4
99~12 Manufacturer specific data (may be used in future)
Undefined
-5
126 System frequency for 100MHz
100MHz
64h
127 Intel Specification details
Detailed 100MHz Information CFh CFh CFh CDh
128+ Unused storage locations
Undefined
-5
Note : 1. The bank select address is excluded in counting the total # of addresses.
2. This value is based on the component specification.
3. These bytes are programmed by code of Date Week & Date Year with BCD format.
4. These bytes are programmed by Samsung s own Assembly Serial # system. All modules may have different unique serial #.
5. These bytes are Undefined and can be used for Samsung s own purpose.
Rev. 0.0 Jan. 2002

11 Page







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