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PDF SCD1283 Data sheet ( Hoja de datos )
| Número de pieza | SCD1283 | |
| Descripción | IEEE 1284-Compatible Parallel Interface | |
| Fabricantes | Intel | |
| Logotipo |  |
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CD1283
IEEE 1284-Compatible Parallel Interface
Product Features
Datasheet
Parallel Port (Peripheral-side)
High-speed, bidirectional, multi-protocol
parallel port:
s Hardware implementation of all modes of
the IEEE STD (Standard) 1284
specification (including automatic
negotiation)
— Centronics-compatible mode
— Reverse Byte mode
— Reverse Nibble mode
— ECP (extended capabilities port) mode
with run-length encoding/decoding
— EPP (enhanced parallel port) mode
— Up to 2-Mbytes/sec. transfer rate in ECP
and EPP modes
s 64-byte parallel FIFO with DMA interface
— 64-byte FIFO can accommodate up to 4
Kbytes of compressed data with RLE
(run-length encoded) compression
enabled
s Supports peripheral-side operation
s Data and control input/output pads support
IEEE STD1284 level-2 interface
specification
s CPU bus interface
— High-speed slave DMA handshake
interface
— Three clocks per word DMA transfers
— On-the-fly data compression using RLE
(run-length encoded) encoding and
decoding
s 8/16-bit data interface
— BYTESWAP input provides easy
interface to both Big- and Little-Endian
systems
— Vectored interrupts simplify interrupt
service routines
General
s System clock up to 25 MHz
s CMOS technology enables high speed and
low power
s Available in a 100-pin MQFP package
As of May 2001, this document replaces the Basis
Communications Corp. document CL-CD1283 — IEEE 1284-Compatible Parallel Interface.
May 2001
1 page  
IEEE 1284-Compatible Parallel Interface — CD1283
8.0
9.0
10.0
Index
7.4.1 EPP Address Register............................................................................67
7.4.2 Input Value Register...............................................................................67
7.4.3 Manual Data Register.............................................................................68
7.4.4 Negotiation Enable Register...................................................................68
7.4.5 Negotiation Status Register....................................................................69
7.4.6 Ones Detect Register .............................................................................70
7.4.7 Output Value Register ............................................................................70
7.4.8 Parallel Channel Interrupt Enable Register ............................................71
7.4.9 Parallel Channel Interrupt Status Register .............................................71
7.4.10 Parallel Configuration Register...............................................................71
7.4.11 Special Command Register....................................................................72
7.4.12 Short Pulse Register ..............................................................................73
7.4.13 Signal Status Register ............................................................................74
7.4.14 Zeros Detect Register ............................................................................74
7.5 Special Register ..................................................................................................74
7.5.1 Reset Command Register ......................................................................74
Electrical Specifications........................................................................................76
8.1 Absolute Maximum Ratings.................................................................................76
8.2 Recommended Operating Conditions .................................................................76
8.3 AC Characteristics...............................................................................................78
8.3.1 Asynchronous Timing.............................................................................78
8.3.2 Synchronous Timing...............................................................................84
Package Dimensions ..............................................................................................90
Ordering Information ..............................................................................................91
......................................................................................................................................... 93
Datasheet
5
5 Page 
2.0
IEEE 1284-Compatible Parallel Interface — CD1283
Conventions
Abbreviations
Symbol
°C
Hz
Kbyte
kHz
kΩ
Mbyte
MHz
µF
µs
mA
ms
ns
pV
Units of Measure
degree Celsius
hertz (cycles per second)
kilobyte (1,024 bytes)
kilohertz
kilohm
megabyte (1,048,576 bytes)
megahertz (1,000 kilohertz)
microfarad
microsecond (1,000 nanoseconds)
milliampere
millisecond (1,000 microseconds)
nanosecond
picovolt
The use of ‘tbd’ indicates values that are ‘to be determined’, ‘n/a’ designates ‘not available’, and
‘N/C’ indicates a pin that is a ‘no connect’.
Acronyms
Acronym
AC
BIOS
CISC
CMOS
DC
DMA
DRAM
ECP
EPP
FIFO
GPIO
HCMOS
HDLC
Definition
alternating current
basic input/output system
complex instruction set computer
complementary metal-oxide semiconductor
direct current
direct-memory access
dynamic random-access memory
extended capibilities port
enhanced parallel port
first in/first out
general-purpose IO
high-performance complementary metal-oxide
semiconductor
high-level data link control
Datasheet
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SCD1283.PDF ] | |
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