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PDF KS57C0504 Data sheet ( Hoja de datos )
| Número de pieza | KS57C0504 | |
| Descripción | (KS57C0502 - KS57P0504) single-chip CMOS microcontroller | |
| Fabricantes | Samsung semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de KS57C0504 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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KS57C0502/C0504/P0504 MICROCONTROLLER
PRODUCT OVERVIEW
1 PRODUCT OVERVIEW
The KS57C0502/C0504 single-chip CMOS microcontroller has been designed for high-performance using
Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers).
The KS57P0504 is the microcontroller which has 4 Kbyte one-time-programmable ROM and the functions are
the same to KS57C0502/C0504. With a four-channel comparator, eight LED direct drive pins, serial I/O
interface, and its versatile 8-bit timer/counter, the KS57C0502/C0504 offers an excellent design solution for a
wide variety of general-purpose applications.
Up to 24 pins of the 30-pin SDIP package can be dedicated to I/O. Five vectored interrupts provide fast re-
sponse to internal and external events. In addition, the KS57C0502/C0504's advanced CMOS technology
provides for very low power consumption and a wide operating voltage range — all at a very low cost.
FEATURES SUMMARY
MEMORY
512 × 4-bit data memory (RAM)
2048 × 8-bit program memory (ROM):KS57C0502
4096 × 8-bit program memory (ROM):KS57C0504
24 I/O PINS
I/O: 18 pins, including 8 high current pins
Input only: 6 pins
COMPARATOR
4-channel mode:
Internal reference (4-bit resolution)
16-step variable reference voltage
3-channel mode:
External reference
150 mV resolution (worst case)
8-BIT BASIC TIMER
Programmable interval timer
Watch-dog timer
8-BIT TIMER/COUNTER
Programmable interval timer
External event counter function
Timer/counter clock output to TCLO0 pin
WATCH TIMER
Time interval generation: 0.5 s, 3.9 ms at 4.19 MHz
4 frequency outputs to BUZ pin
8-BIT SERIAL I/O INTERFACE
8-bit transmit/receive mode
8-bit receive-only mode
LSB-first or MSB-first transmission selectable
Internal or external clock source
BIT SEQUENTIAL CARRIER
Supports 16-bit serial data transfer in arbitrary
format
INTERRUPTS
Two external interrupt vectors
Three internal interrupt vectors
Two quasi-interrupts
MEMORY-MAPPED I/O STRUCTURE
Data memory bank 15
TWO POWER-DOWN MODES
Idle mode: Only CPU clock stops
Stop mode: System clock stops
OSCILLATION SOURCES
Crystal, Ceramic for system clock
Crystal/ceramic: 0.4 - 6.0 MHz
CPU clock divider circuit (by 4. 8, or 64)
INSTRUCTION EXECUTION TIMES
0.95, 1.91, 15.3 µs at 4.19 MHz
0.67, 1.33, 10.7 µs at 6.0 MHz
OPERATING TEMPERATURE
– 40 °C to 85 °C
OPERATING VOLTAGE RANGE
1.8 V to 5.5 V
PACKAGE TYPE
30 SDIP, 32 SOP
1–1
1 page  
KS57C0502/C0504/P0504 MICROCONTROLLER
PRODUCT OVERVIEW
POWER-DOWN
To reduce power consumption, there are two power-down modes: idle and stop. The IDLE instruction initiates
idle mode; the STOP instruction initiates stop mode.
In idle mode, the CPU clock stops while peripherals continue to operate normally. In stop mode, system clock
oscillation stops completely, halting all operations except for a few basic peripheral functions. A power-down is
terminated either by a RESET or by an interrupt (with exception of the external interrupt INT0).
RESET
When RESET is input during normal operation or during power-down mode, a reset operation is initiated and
the CPU enters idle mode. When the standard oscillation stabilization time interval (31.3 ms at 4.19 MHz) has
elapsed, normal CPU operation resumes.
I/O PORTS
The KS57C0502/C0504 has seven I/O ports. Pin addresses for all I/O ports are mapped to locations FF0H–
FF6H in bank 15 of the RAM. There are 6 input pins and 18 configurable I/O pins including 8 high current I/O
pins for a total of 24 I/O pins. The contents of I/O port pin latches can be read, written, or tested at the
corresponding address using bit manipulation instructions.
TIMERS and TIMER/COUNTER
The timer function has three main components: an 8-bit basic timer, an 8-bit timer/counter, and a watch timer.
The 8-bit basic timer generates interrupt requests at precise intervals, based on the selected internal clock
frequency.
The programmable 8-bit timer/counter is used for counting events, modifying internal clock frequencies, and
dividing external clock signals. The 8-bit timer/counter generates a clock signal (SCK) for the serial I/O interface.
The watch timer consists of an 8-bit watch timer mode register, a clock selector, and a frequency divider
circuit. Its functions include real-time, watch-time measurement, and clock generation for frequency output for
buzzer sound.
SERIAL I/O INTERFACE
The serial I/O interface supports the transmission or reception of 8-bit serial data with an external device. The
serial interface has the following functional components:
— 8-bit mode register
— Clock selector circuit
— 8-bit buffer register
— 3-bit serial clock counter
The serial I/O circuit can be set to transmit-and-receive, or to receive-only mode. MSB-first or LSB-first
transmission is also selectable.
The serial interface can operate with an internal or an external clock source, or using the clock signal
generated by the 8-bit timer/counter. Transmission frequency can be modified by setting the appropriate bits in
the SIO mode register.
1–5
5 Page 
KS57C0502/C0504/P0504 MICROCONTROLLER
PIN CIRCUIT DIAGRAMS
VDD
P-CHANNEL
IN
N-CHANNEL
Figure 1–3. Pin Circuit Type A
VDD
PULL-UP
RESISTOR
P-CHANNEL
RESISTOR
ENABLE
IN
SCHMITT TRIGGER
Figure 1–4. Pin Circuit Type A-3
PRODUCT OVERVIEW
VDD
PULL-UP
RESISTOR
IN
SCHMITT TRIGGER
Figure 1–5. Pin Circuit Type B
DATA
OUTPUT
DISABLE
VDD
P-CHANNEL
OUT
N-CHANNEL
Figure 1–6. Pin Circuit Type C
1–11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet KS57C0504.PDF ] | |
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