PDF M36L0R8060 Data sheet ( Hoja de datos )

Número de pieza	M36L0R8060
Descripción	256 Mbit (Multiple Bank / Multi-Level / Burst) Flash Memory 64 Mbit (Burst) PSRAM
Fabricantes	ST Microelectronics
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No Preview Available ! M36L0R8060T0 M36L0R8060B0 256 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory 64 Mbit (Burst) PSRAM, 1.8V Supply, Multi-Chip Package PRELIMINARY DATA FEATURES SUMMARY ■ MULTI-CHIP PACKAGE – 1 die of 256 Mbit (16Mb x16, Multiple Bank, Multi-level, Burst) Flash Memory – 1 die of 64 Mbit (4Mb x16) Pseudo SRAM ■ SUPPLY VOLTAGE – VDDF = VCCP = VDDQ = 1.7 to 1.95V – VPP = 9V for fast program ■ ELECTRONIC SIGNATURE – Manufacturer Code: 20h – Top Device Code M36L0R8060T0: 880Dh – Bottom Device Code M36L0R8060B0: 880Eh ■ PACKAGE – Compliant with Lead-Free Soldering Processes – Lead-Free Versions FLASH MEMORY ■ SYNCHRONOUS / ASYNCHRONOUS READ – Synchronous Burst Read mode: 54MHz – Asynchronous Page Read mode – Random Access: 85ns ■ SYNCHRONOUS BURST READ SUSPEND ■ PROGRAMMING TIME – 10µs typical Word program time using Buffer Enhanced Factory Program command ■ MEMORY ORGANIZATION – Multiple Bank Memory Array: 16 Mbit Banks – Parameter Blocks (Top or Bottom location) ■ DUAL OPERATIONS – program/erase in one Bank while read in others – No delay between read and write operations ■ SECURITY – 64 bit unique device number – 2112 bit user programmable OTP Cells Figure 1. Package FBGA TFBGA88 (ZAQ) 8 x 10mm ■ BLOCK LOCKING – All blocks locked at power-up – Any combination of blocks can be locked with zero latency – WPF for Block Lock-Down – Absolute Write Protection with VPPF = VSS ■ COMMON FLASH INTERFACE (CFI) ■ 100,000 PROGRAM/ERASE CYCLES per BLOCK PSRAM ■ ACCESS TIME: 70ns ■ ASYNCHRONOUS PAGE READ – Page Size: 16 words – Subsequent read within page: 20ns ■ LOW POWER FEATURES – Temperature Compensated Refresh (TCR) – Partial Array Refresh (PAR) – Deep Power-Down (DPD) Mode ■ SYNCHRONOUS BURST READ/WRITE December 2004 1/18 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1 page M36L0R8060T0, M36L0R8060B0 Figure 3. TFBGA Connections (Top view through package) 12345678 A DU DU DU DU B A4 A18 A19 VSS VDDF NC A21 A11 C A5 LBP A23 VSS NC K A22 A12 D A3 A17 NC VPPF WP EP A9 A13 E A2 A7 NC WPF L A20 A10 A15 F A1 A6 UBP RPF WF A8 A14 A16 G A0 DQ8 DQ2 DQ10 DQ5 DQ13 WAIT NC H GP DQ0 DQ1 DQ3 DQ12 DQ14 DQ7 NC J NC GF DQ9 DQ11 DQ4 DQ6 DQ15 VDDQ K EF DU DU NC VCCP NC VDDQ CRP L VSS VSS VDDQ VDDF VSS VSS VSS VSS M DU DU DU DU AI09313 5/18 5 Page M36L0R8060T0, M36L0R8060B0 MAXIMUM RATING Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause per- manent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not im- plied. Exposure to Absolute Maximum Rating con- ditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality docu- ments. Table 3. Absolute Maximum Ratings Symbol Parameter Value Min Max Unit TA Ambient Operating Temperature –25 85 °C TBIAS Temperature Under Bias –25 85 °C TSTG Storage Temperature –65 125 °C TLEAD Lead Temperature during Soldering (1) °C VIO Input or Output Voltage –0.5 2.75 V VDDF, VDDQ, VCCP Core and Input/Output Supply Voltages –0.2 2.45 V VPPF Flash Program Voltage –0.2 10 V IO Output Short Circuit Current 100 mA tVPPFH Time for VPPF at VPPFH 100 hours Note: 1. Compliant with the JEDEC Std J-STD-020B (for small body, Sn-Pb or Pb assembly), the ST ECOPACK® 7191395 specification, and the European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU. 11/18 11 Page

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Número de pieza	Descripción	Fabricantes
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