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PDF CDB5381 Data sheet ( Hoja de datos )
| Número de pieza | CDB5381 | |
| Descripción | Multi-Bit Audio A/D Converter | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CDB5381 (archivo pdf) en la parte inferior de esta página. Total 24 Páginas | ||
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CS5381
120 dB, 192 kHz, Multi-Bit Audio A/D Converter
Features
! Advanced Multi-bit Delta-Sigma Architecture
! 24-bit Conversion
! 120 dB Dynamic Range
! -110 dB THD+N
! Supports All Audio Sample Rates Including
192 kHz
! 260 mW Power Consumption
! High-Pass Filter or DC Offset Calibration
! Supports Logic Levels between 5 and 2.5 V
! Differential Analog Architecture
! Low-Latency Digital Filtering
! Overflow Detection
! Pin-Compatible with the CS5361
General Description
The CS5381 is a complete analog-to-digital converter
for digital audio systems. It performs sampling, analog-
to-digital conversion, and anti-alias filtering - generating
24-bit values for both left and right inputs in serial form
at sample rates up to 216 kHz per channel.
The CS5381 uses a 5th-order, multi-bit delta-sigma
modulator followed by digital filtering and decimation,
which removes the need for an external anti-alias filter.
The ADC uses a differential architecture which provides
excellent noise rejection.
The CS5381 is available in 24-pin TSSOP and SOIC
packages for Commercial grade (-10° to +70° C). The
CDB5381 Customer Demonstration board is also avail-
able for device evaluation and implementation
suggestions. Please refer to the “Ordering Information”
on page 22.
The CS5381 is ideal for audio systems requiring wide
dynamic range, negligible distortion, and low noise -
such as A/V receivers, DVD-R, CD-R, digital mixing
consoles, and effects processors.
Analog Supply
5V
Digital Supply
3.3 V to 5 V
Interface Supply
2.5 V to 5 V
Differential
Inputs
Differential
Inputs
Internal Voltage
Reference
Switch-Cap
ADC
Switch-Cap
ADC
Digital
Filters
Digital
Filters
Reset
Mode
Configuration
HPF
OVFL
PCM Serial
Audio Output
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
JULY '05
DS563F2
1 page  
CS5381
2. CHARACTERISTICS AND SPECIFICATIONS
All Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. Typical per-
formance characteristics and specifications are derived from measurements taken at VA = 5.0 V, VD = VL = 3.3 V,
and TA = 25°C.
SPECIFIED OPERATING CONDITIONS
(GND = 0 V; all voltages with respect to 0 V.)
Parameters
Symbol
Min
Typ
Max Units
DC Power Supply
DC Power Supplies:
Positive Analog
Positive Digital
Positive Logic
VA
VD
VL
4.75 5.0 5.25 V
3.1 - 5.25 V
2.37 - 5.25 V
Ambient Operating Temperature (Power Applied)
TA -10 - +70 °C
ABSOLUTE MAXIMUM RATINGS
(GND = 0 V, All voltages with respect to ground.) (Note 1)
DC Power Supplies:
Parameter
Input Current
Analog Input Voltage
Digital Input Voltage
Ambient Operating Temperature (Power Applied)
Storage Temperature
Symbol
Analog
Logic
Digital
VA
VL
VD
(Note 2)
(Note 3)
(Note 3)
Iin
VIN
VIND
TA
Tstg
Min
-0.3
-0.3
-0.3
-10
GND-0.7
-0.7
-50
-65
Typ Max Units
- +6.0
- +6.0
- +6.0
V
V
V
- +10 mA
- VA+0.7 V
- VL+0.7 V
- +95 °C
- +150 °C
Notes:
1. Operation beyond these limits may result in permanent damage to the device. Normal operation is not
guaranteed at these extremes.
2. Any pin except supplies. Transient currents of up to ±100 mA on the analog input pins will not cause
SRC latch-up.
3. The maximum over/under voltage is limited by the input current.
DS563F2
5
5 Page 
CS5381
LRCK output
SCLK output
SDOUT
tmslr
MSB
tsdo
MSB-1 MSB-2 MSB-3
LRCK input
SCLK input
SDOUT
t slrd
t sclkh
tstp thld
MSB
t sclkl
MSB-1
Figure 13. Master Mode, Left-Justified SAI
Figure 14. Slave Mode, Left-Justified SAI
LRCK output
SCLK output
SDOUT
tmslr
MSB
LRCK input
tsdo
MSB-1 MSB-2 MSB-3
SCLK input
SDOUT
t slrd
t sclkh
t sclkl
tstp thld
MSB
Figure 15. Master Mode, I²S SAI
Figure 16. Slave Mode, I²S SAI
LRCK
OVFL
t setup
t hold
Figure 17. OVFL Output Timing
DS563F2
11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet CDB5381.PDF ] | |
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