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PDF TC9447F Data sheet ( Hoja de datos )
| Número de pieza | TC9447F | |
| Descripción | Single-Chip Audio Digital Signal Processor | |
| Fabricantes | Toshiba Semiconductor | |
| Logotipo |  |
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TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC9447F
Single-Chip Audio Digital Signal Processor
TC9447F
The TC9447F is a single-chip audio digital signal processor
incorporating an AD/DA converter. The built-in program memory
(ROM) can contain a range of application programs for concert
hall acoustic field simulation, for digital filters such as equalizers,
and for dynamic range control. In addition, the device includes
64kb of data delay RAM, making external RAM unnecessary.
Features
· Incorporates a 1-bit Σ∆-type AD converter (two channels).
THD: −82dB, S/N ratio: 95dB (typ.)
· Incorporates a 1-bit Σ∆-type DA converter (four channels).
Weight: 1.57g (typ.)
THD: −85dB, S/N ratio: 100dB (typ.)
· A ±10-dB attenuator is built into the DA converter output block (two channels only)
· Each port has a digital input/output (three lead-type)
· A built-in self-boot function automatically sets the coefficients and register values at initialization.
Boot ROM
: 1024 words × 18 bits
· The DSP block specifications are as follows:
Data bus
: 24 bits
Multiplier/adder
: 24 bits × 16 bits + 43 bits → 43 bits
Accumulator
: 43 bits (sign extension: 4 bits)
Program ROM
: 1024 words × 32 bits
Coefficient RAM
: 320 words × 16 bits
Coefficient ROM
: 256 words × 16 bits
Offset RAM
: 64 words × 16 bits
Data RAM
: 256 words × 24 bits
Operation speed
: 44ns (510-step (approx) operation per cycle at fs = 44.1 kHz)
Interface buffer RAM : 32 words × 16 bits
· Incorporates data delay RAM.
Delay RAM
: 4096 words × 16 bits (64 kbits)
· The microcontroller interface can be selected between Standard Transmission mode and I2C bus mode.
· CMOS silicon structure supports high speed.
· The package is a 100-pin flat package.
1 2002-02-05
1 page  
Pin
No.
Symbol I/O
Function
58
VDD
― Power pin
59 SYNC I Program SYNC signal input pin
60 ELRO I LR clock input pin for serial data output
61 ELRI I LR clock input pin for serial data input
62 EBCO I Bit clock input pin for serial data output
63 EBCI I Bit clock input pin for serial data input
64 DIN I Serial data input pin
65
DOUT
O Serial data output pin
66 EM0 I De-emphasis setting pin 0
67 EM1 I De-emphasis setting pin 1
68 IFF0 I Interface flag pin 0
69 IFF1 I Interface flag pin 1
70 IFF2 I Interface flag pin 2
71
GND
― Ground pin
72 CS I Microcontroller interface chip select signal input pin
73 IFCK I Microcontroller interface data shift clock input pin
74 IFDI I/O M(Dicartoacionnpturto/olleurtpinutteprifnacwehdeantaI2iCnpbuutspsinelected)
75
IFDO
O M(LiecarovceoonptreonllewrhinetnerIf2aCcebudsatsaeoleucttpeudt.)pin
76
IFOK
O Microcontroller interface operation flag output pin
77 ACK O Microcontroller interface acknowledge output pin
78 ERR O Microcontroller interface error flag output pin
79 I2CS I Microcontroller interface I2C bus switching pin
80 BOOT I Self-boot control pin
81 BA0 I Boot address setting pin 0
82 BA1 I Boot address setting pin 1
83
VDD
― Power pin
84~87 TST0~TST3 I Test pins. Use fixed to low level.
88
GND
― Ground pin
89
VSAL
― Ground pin for analog mode (ADC L channel)
90 LIN I ADC analog signal input pin (L channel)
91
AVRL
― ADC reference voltage pin (L channel)
92
VDL
― Power pin for analog mode (ADC L channel)
93
VDR
― Power pin for analog mode (ADC R channel)
94
AVRR
― ADC reference voltage pin (R channel)
95 RIN I ADC analog signal input pin (R channel)
96
VSAR
― Ground pin for analog mode (ADC R channel)
97
GNDX
― Ground pin for oscillator circuit
98 XI I Crystal oscillator connecting pin (input)
99 XO O Crystal oscillator connecting pin (output)
100 VDX ― Power pin for oscillator circuit
5
TC9447F
Remarks
Schmitt input
Schmitt input
Schmitt input
Schmitt input
Schmitt input
Schmitt input
Push-pull output
Schmitt input
Schmitt input
Schmitt input
Schmitt input
Schmitt input
Schmitt input
Schmitt input
Schmitt input/
open drain output
Push-pull output
Open drain output
Open drain output
Open drain output
Schmitt input
Schmitt input
Schmitt input
Schmitt input
Pulled-down resistor
(with on/off switching
function)
2002-02-05
5 Page 
TC9447F
(2) Standard transmission mode 2
When I2CS = L, data can be transmitted or received in Standard Transmission mode.
When the CS signal is Low, control from the microcontroller is enabled.
The IFCK signal is the transmit/receive clock. The IFDI signal is the data. The TC9447F loads the
IFDI data on the IFCK signal rising edge. When CS = H, the IFCK and IFDI signals are don't care.
(2-1) Setting registers
The registers are set by command data using the IFDI signal. The first byte is a command, which
differs for each register. The data sent after that are fixed to two bytes. Both command and data
are sent starting from the MSB.
The ACK signal is the acknowledge signal that the TC9447F returns to the microcontroller. As
the ACK signal is open drain output, it must be pulled up outside the pin. The data are loaded
on the rising edge of the IFCK signal.
Note that commands or data that must be switched on the SYNC signal, such as the RUN
command or the IFF flag, must be synchronized with the SYNC signal and loaded on that signal.
(2-2) Setting RAM (sequential)
The RAMs are set by command data using the IFDI signal. The first byte is a command, which
differs for each RAM. The next two bytes contain the start address for the RAM written.
The length of the data field following the RAM address bytes is 2 × n bytes. The address is
automatically incremented by 1.
11 2002-02-05
11 Page | ||
| Páginas | Total 44 Páginas | |
| PDF Descargar | [ Datasheet TC9447F.PDF ] | |
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