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PDF BC41B143A-ds-003Pc Data sheet ( Hoja de datos )

Número de pieza BC41B143A-ds-003Pc
Descripción Blue Core ROM Plug-n-Go
Fabricantes CSR　
Logotipo CSR Logotipo



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Device Features
_äìÉ`çêÉ»QJolj=mäìÖJåJdç»
ƒ Fully Qualified Bluetooth v2.0+EDR system
ƒ Full Speed Bluetooth Operation with Full Piconet
Support
ƒ Scatternet Support
ƒ Low Power 1.8V operation
ƒ 10 x 10mm 96-ball LFBGA Package
ƒ Minimum External Components
ƒ Integrated 1.8V Regulator
ƒ Dual UART Ports
ƒ RF Plug-n-Go Package
ƒ 50Ω Matched Connection to Antenna
ƒ RoHS Compliant
General Description
The _äìÉ`çêÉ»QJolj=mäìÖJåJdç» is a single
chip radio and baseband IC for Bluetooth 2.4GHz
systems. It is implemented in 0.18µm CMOS
technology.
BC41B143A contains 4Mbit of internal ROM memory.
When used with CSR Bluetooth stack, it provides a
fully compliant Bluetooth system to v2.0 + EDR of the
specification for data and voice.
BlueCore4-ROM Plug-n-Go has the same pinout and
electrical characteristics as available in
BlueCore4-Flash Plug-n-Go to enable development
of custom code before committing to ROM. It also has
the same pinout as BlueCore2-ROM Plug-n-Go and
BlueCore2-Flash Plug-n-Go to keep compatibility.
RAM
SPI
RF IN
RF
OUT
2.4
GHz
Radio
ROM
Baseband
DSP
I/O
UART/USB
PIO
MCU
PCM
Single Chip Bluetooth®
v2.0 + EDR System
Advance Information Data Sheet For
BC41B143A
July 2005
Applications
ƒ Automotive
ƒ Mice
ƒ Keyboards
BlueCore4-ROM Plug-n-Go has been designed to
reduce the number of external components required
which ensures production costs are minimised. The
0.8mm pitch BlueCore4-ROM Plug-n-Go can be used
on either two or four layer PCB construction.
The device incorporates auto-calibration and built in
self test (BIST) routines to simplify development, type
approval and production test. All hardware and
device firmware is fully compliant with the Bluetooth
v2.0 + EDR specification.
XTAL
System Architecture
Data Sheet
Advance InformationCSR PLC2005
c2005BC41B143A-ds-003P© 2005 Cambridge Silicon Radio Limited
BC41B143A-ds-003Pc
Advance Information
© Cambridge Silicon Radio Limited 2005
Page 1 of 94

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BC41B143A-ds-003Pc pdf
List of Figures
Figure 3.1
Figure 7.1
Figure 9.1
Figure 9.2
Figure 9.3
Figure 9.4
Figure 10.1
Figure 10.2
Figure 10.3
Figure 10.4
Figure 10.5
Figure 10.6
Figure 10.7
Figure 10.8
Figure 10.9
Figure 10.10
Figure 10.11
Figure 10.12
Figure 10.13
Figure 10.14
Figure 10.15
Figure 10.16
Figure 10.17
Figure 10.18
Figure 10.19
Figure 10.20
Figure 10.21
Figure 10.22
Figure 10.23
Figure 10.24
Figure 10.25
Figure 10.26
Figure 10.27
Figure 10.28
Figure 10.29
Figure 10.30
Figure 13.1
Figure 14.1
BlueCore4-ROM Plug-n-Go 10 x 10mm LFBGA Package ........................................................... 9
BlueCore4-ROM Plug-n-Go Device Diagram ............................................................................. 32
BlueCore HCI Stack.................................................................................................................... 36
BlueCore RFCOMM Stack.......................................................................................................... 39
Virtual Machine ........................................................................................................................... 41
HID Stack.................................................................................................................................... 42
Circuit for RF_CONNECT ........................................................................................................... 44
Circuit RF_IN .............................................................................................................................. 45
TCXO Clock Accuracy ................................................................................................................ 46
Actual Allowable Clock Presence Delay on XTAL_IN vs. PS Key Setting.................................. 47
Crystal Driver Circuit ................................................................................................................... 49
Crystal Equivalent Circuit............................................................................................................ 49
Crystal Load Capacitance and Series Resistance Limits with Crystal Frequency...................... 53
Crystal Driver Transconductance vs. Driver Level Register Setting ........................................... 54
Crystal Driver Negative Resistance as a Function of Drive Level Setting .................................. 55
Universal Asynchronous Receiver .............................................................................................. 56
Break Signal................................................................................................................................ 57
UART Bypass Architecture ......................................................................................................... 58
USB Connections for Self-Powered Mode.................................................................................. 60
USB Connections for Bus-Powered Mode.................................................................................. 61
USB_DETACH and USB_WAKE_UP Signal.............................................................................. 62
Write Operation........................................................................................................................... 65
Read Operation........................................................................................................................... 65
BlueCore4-ROM Plug-n-Go as PCM Interface Master ............................................................... 67
BlueCore4-ROM Plug-n-Go as PCM Interface Slave ................................................................. 67
Long Frame Sync (Shown with 8-bit Companded Sample) ........................................................ 68
Short Frame Sync (Shown with 16-bit Sample) .......................................................................... 68
Multi-slot Operation with Two Slots and 8-bit Companded Samples .......................................... 69
GCI Interface............................................................................................................................... 69
16-Bit Slot Length and Sample Formats ..................................................................................... 70
PCM Master Timing Long Frame Sync....................................................................................... 72
PCM Master Timing Short Frame Sync ...................................................................................... 72
PCM Slave Timing Long Frame Sync......................................................................................... 74
PCM Slave Timing Short Frame Sync ........................................................................................ 74
Example EEPROM Connection .................................................................................................. 79
Example TXCO Enable OR Function.......................................................................................... 80
Application Circuit for Radio Characteristics Specification ......................................................... 86
BlueCore4-ROM Plug-n-Go 96-Ball LFBGA 1.6mm Package Dimensions ................................ 87
List of Tables
Table 10.1
Table 10.2
Table 10.3
Table 10.4
Table 10.5
Table 10.6
Table 10.7
Table 10.8
External Clock Specifications...................................................................................................... 46
PS Key Values for CDMA/3G Phone TCXO Frequencies .......................................................... 48
Crystal Specification ................................................................................................................... 50
Possible UART Settings.............................................................................................................. 56
Standard Baud Rates.................................................................................................................. 57
USB Interface Component Values .............................................................................................. 60
Instruction Cycle for an SPI Transaction..................................................................................... 64
PCM Master Timing .................................................................................................................... 71
BC41B143A-ds-003Pc
Advance Information
© Cambridge Silicon Radio Limited 2005
Page 5 of 94

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BC41B143A-ds-003Pc arduino
Package Information
Test and Debug
RESET
RESETB
SPI_CSB
SPI_CLK
SPI_MOSI
SPI_MISO
TEST_EN
FLASH_EN
Ball Pad Type
Description
F9
CMOS input with weak internal Reset if high. Input debounced so must be
pull-down
high for >5ms to cause a reset
G9
CMOS input with weak internal Reset if low. Input debounced so must be low
pull-up
for >5ms to cause a reset
C10
CMOS input with weak internal Chip select for Serial Peripheral Interface,
pull-up
active low
D10
CMOS input with weak internal
pull-down
Serial Peripheral Interface clock
D11
CMOS input with weak internal
pull-down
Serial Peripheral Interface data input
C11
CMOS output, tristatable with
weak internal pull-down
Serial Peripheral Interface data output
E9
CMOS input with strong
internal pull-down
For test purposes only (leave unconnected)
B10 No connect
Not available for BlueCore4-ROM Plug-n-Go
BC41B143A-ds-003Pc
Advance Information
© Cambridge Silicon Radio Limited 2005
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