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PDF FW82801E Data sheet ( Hoja de datos )

Número de pieza FW82801E
Descripción Communications I/O Controller Hub
Fabricantes Intel 
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Intel® 82801E Communications I/O
Controller Hub (C-ICH)
for Applied Computing
Advance Information Datasheet
Product Features
s Supports Intel processors, the
82815E GMCH and the 82810E GMCH
s 8-Bit Hub Interface
— 266 Mbyte/s maximum throughput
s Two integrated LAN controllers
s USB
— Includes one UHCI Host Controller
with a total of two ports
— USB 1.1 compliant
s PCI Bus interface
— Supports PCI Rev 2.2 specification at
33 MHz
— 133 Mbyte/s maximum throughput
s Low-Pincount (LPC) interface
s Firmware Hub (FWH) interface
— Supports 8-Mbyte memory size
s Integrated IDE controller supports
Ultra100 DMA, Ultra66 and Ultra33
DMA mode transfers
s Interrupt Controller
— Two cascaded 82C59 interrupt
controllers
— Integrated I/O (x) APIC supporting 24
interrupts
— 15 interrupts supported in 8259 mode
s Two cascaded 8237 DMA controllers
s Integrated 82C54-compatible timers
s Real-time clock with 256-byte battery-
backed CMOS RAM
s System Management Bus (SMBus)
— Compatible with most two-wire
components that are also I2C compatible
— Slave interface allows external
microcontroller to access system
resources
s GPIO
— Exact number varies by configuration.
Maximum: 12 inputs, eight outputs, four
I/O
s Integrated 16550 compatible UARTs
— Two UARTs
— Serial Interrupts
s Supports IRQ1/IRQ12 emulation to avoid
external keyboard controller
s 1.8 V operation with 3.3 V I/O. 5 V
tolerance on many buffers, including PCI
and IDE
s Package: 421 BGA
Notice: This document contains information on products in the sampling and initial production
phases of development. The specifications are subject to change without notice. Verify with your
local Intel sales office that you have the latest datasheet before finalizing a design.
Order Number: 273598-003
January 2002

1 page




FW82801E pdf
Contents
Tables
1 PCI Devices and Functions ..........................................................................................................9
2 Related Documents ....................................................................................................................10
3 Industry Specifications................................................................................................................ 10
4 Ball List By Number ....................................................................................................................12
5 Ball List By Signal Name ............................................................................................................ 17
6 82801E C-ICH Signal Description .............................................................................................. 25
7 Hub Interface Signals ................................................................................................................. 36
8 LAN Interface.............................................................................................................................. 36
9 EEPROM Interface ..................................................................................................................... 36
10 Firmware Hub Interface Signals .................................................................................................37
11 PCI Interface Signals .................................................................................................................. 37
12 IDE Interface Signals .................................................................................................................. 40
13 LPC Interface Signals ................................................................................................................. 41
14 Interrupt Signals.......................................................................................................................... 41
15 USB Interface Signals................................................................................................................. 42
16 Power Signals............................................................................................................................. 42
17 Processor Interface Signals ........................................................................................................43
18 SMBus Interface Signals ............................................................................................................ 44
19 System Management Interface Signals ...................................................................................... 44
20 Real Time Clock Interface .......................................................................................................... 44
21 Other Clocks ............................................................................................................................... 45
22 Universal Asynchronous Receive And Transmit (UART 0, 1) ....................................................45
23 SIU Interface............................................................................................................................... 46
24 Miscellaneous Signals ................................................................................................................ 47
25 General Purpose I/O Signals ...................................................................................................... 47
26 Power and Ground Signals......................................................................................................... 48
27 Functional Strap Definitions ........................................................................................................49
28 Test Mode Selection ................................................................................................................... 49
29 82801E C-ICH Power Planes ..................................................................................................... 51
30 Integrated Pull-Up and Pull-Down Resistors ..............................................................................52
31 IDE Series Termination Resistors............................................................................................... 52
32 Power Plane and States for Output and I/O Signals................................................................... 53
33 Power Plane for Input Signals ................................................................................................ .... 56
34 Absolute Maximum Ratings ........................................................................................................57
35 Functional Operating Range....................................................................................................... 57
36 82801E C-ICH Power Consumption Measurements ..................................................................58
37 DC Characteristic Input Signal Association ................................................................................ 58
38 DC Input Characteristics............................................................................................................. 59
39 DC Characteristic Output Signal Association ............................................................................. 59
40 DC Output Characteristics .......................................................................................................... 60
41 Other DC Characteristics............................................................................................................ 61
42 Clock Timings ............................................................................................................................. 62
43 Clock Timings - UART_CLK ....................................................................................................... 63
44 PCI Interface Timing ................................................................................................................... 63
45 IDE PIO & Multiword DMA Mode Timing .................................................................................... 64
46 Ultra ATA Timing (Mode 0, Mode 1, Mode 2) ............................................................................. 65
47 Ultra ATA Timing (Mode 3, Mode 4, Mode 5) ............................................................................. 66
48 Universal Serial Bus Timing........................................................................................................67
49 IOAPIC Bus Timing..................................................................................................................... 68
Advance Information Datasheet
5

5 Page





FW82801E arduino
Intel® 82801E C-ICH
2.0 Package Information
2.1 Ball Location
This section describes the 82801E C-ICH ball assignment. Figure 3 provides a 421-ball location
diagram. The diagram also indicates general signal groupings. Table 4 lists the 82801E C-ICH
signal assignments by ball number. Table 5 lists the assignments alphabetically by signal name.
Figure 3. Ball Diagram (Top View)
PCI LPC SIU
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
AA
VSS
AD[28] GNT[3]#
NC[4]
PIRQ[A]#
VSS
PIRQ[H]#/
GPIO[5]
GNT[0]#
VSS GPIO[21] THRM#
TP[0]
VSS
SIU_ SIU_ SIU1_ VSS
SERIRQ LAD[1] RTS#
SIU1_ UART_ VSS
DSR# CLK
SIU0_ LAN1_ VSS
RI# TXD[1]
BB
FRAME# AD[16] AD[22]
AD[26]
REQ[0]#
NC[5]
PIRQ[D]#
VCC1_8
GNT[B]#/
GNT[5]#/
GPIO[17]
GNT[A]#/LDRQ[0]#
GPIO[16]
LAD[0]/
FWH[0]
LAD[3]/
FWH[3]
Vcc1_8 SIU_ SIU1_
LFRAME# DTR#
VCC3_3
SIU1_
RXD
SIU0_
DTR#
SIU0_ LAN1_ Vcc1_8 LAN1_
DCD# CLK
RXD[2]
CC
AD[13] AD[20] PAR VSS AD[30] VSS PIRQ[C]#PIRQ[E]#REQ[A]#/REQ[B]#/ LDRQ[1]# VSS LFRAME#/ SIU_
SIU_ SIU1_ SIU1_ Vcc3_3 VSS LAN1_ LAN1_ LAN1_ EE0_
GPIO[0] REQ[5]#/
FWH[4] LAD[2] LDRQ# DCD# TXD
TXD[0] RXD[0] RSTSYNC SHCLK
GPIO[1]
DD
VSS
AD[4] AD[15] STOP# AD[18] AD[24] REQ[1]# PIRQ[B]# VSS GNT[1]# V5REF LAD[1]/ SIU_ SIU_ SIU1_ SIU1_ SIU0_ SIU0_ SIU0_ LAN1_ EE1_ VSS LAN0_
FWH[1] RESET# LAD[0] RI# CTS# CTS# DSR# TXD TXD[2] DOUT
RSTSYNC
EE
AD[0] Vcc1_8 AD[9] TRDY#
VSS Vcc3_3
VSS
GNT[2]#
REQ[2]#PIRQ[F]#PGIRPQIO[G[4]#] /
LAD[2]/
FWH[2]
SIU_
LCLK
SIU_
LAD[3]
VSS
SIU0_ SIU0_
VSS EE1_ EE0_ LAN0_ LAN0_
RTS# RXD Vcc3_3
SHCLK DIN RXD[2] TXD[2]
F
AD[7] AD[10] AD[6] C/BE[0]# AD[11] Vcc3_3 Vcc3_3 Vcc1_8 Vcc1_8 Vcc1_8
Vcc1_8 Vcc3_3 Vcc3_3 Vcc3_3 Vcc3_3 EE1_CS
Vcc1_8
Vcc1_8
EE0_CS
LAN0_CLK
F
G
SERR# AD[12] VSS AD[3] AD[2] Vcc3_3
H
C/BE[1]# AD[14] AD[8] AD[1] AD[5] Vcc3_3
Vcc3_3 EE1_ EE0_ LAN0_ VSS LAN0_
DIN DOUT TXD[1]
RXD[1]
Vcc3_3 LAN1_ LAN0_ LAN0_ Vcc1_8 VSS
RXD[1] RXD[0] TXD[0]
G
H
J
VSS C/BE[2]#
PERR# VSS Vcc3_3
DEVSEL#
Vcc1_8 VSS
VSS VSS
VSS CLK66
(HLCLK)
J
K
AD[23] AD[19] AD[17] IRDY# PLOCK# Vcc3_3
Vcc1_8 VSS Vcc1_8 VSS Vcc1_8
Vcc1_8
HUBREF VSS HL[11] VSS
HLCOMP
K
L
AD[27] AD[25] VSS C/BE[3]# AD[21]
VSS VSS VSS VSS Vcc1_8
HL[0] VSS HL[1] VSS HL[2]
L
M
AD[29] AD[31] GPIO[6] REQ[3]# PCICLK
Vcc1_8 VSS VSS VSS Vcc1_8
HL[9] HL[3] VSS HL_STB VSS
M
N
VSS
GPIO[27]
Vcc1_8
GPIO[7]
GPIO[28]
VSS VSS VSS VSS VSS
HL[4] VSS HL[10] VSS HL_STB#
P
GPIO[8]
GPIO[13]
VSS Vcc3_3
GPIO[12]
RESERVED1
R
PCIRST#
Vcc3_3
RI# Vcc3_3
GPIO[25]
SMBDATA
Vcc1_8 VSS Vcc1_8 VSS Vcc1_8
HL[7] HL[5] VSS HL[8] VSS
Vcc1_8
CPUSLP# VSS
Vcc1_8
VSS
VSS HL[6]
T
VSS
RSM_PWROK
USBP0N
SMBCLK
NC[12]
Vcc3_3
GPIO[20]
SMI#
A20M#
Vcc1_8
GPIO[23]
STPCLK#
U
V
W
Y
AA
AB
AC
SMBALERT#/ NC[11] SUSCLK
VSS Vcc3_3
GPIO[11]
USBP0P
Vcc3_3 SDCS1# GPIO[22] INIT# NMI INTR
NC[10] USBP1N Vcc3_3 NC[6] V5REF Vcc3_3 Vcc3_3 Vcc3_3 Vcc3_3 Vcc3_3
Vcc3_3 Vcc3_3 Vcc3_3 Vcc3_3
SDDACK#
V_CPU_IO
IGNNE#
Vcc3_3
SIORDY
CPUPWRGD
USBP1P NC[9] NC[7] OC[1]# VSS VSS NC[1] VccRTC PWROK Vcc3_3 CLK14 PDD[5] PDD[1] PDCS1# PDA[1] SDD[5] SDD[14]
SDIOW#
VRMPWRGD
RCIN#
SDIOR#
SDA[2]
V_CPU_IO
VSS NC[8] V5REF
SMLINK[0] VSS RTCX1 RSMRST# NC[2] APICD[1] PDD[6]
PDD[12]
SDD[6]
SDD[10]
SDD[0]
SDCS3#
A20GATE
RESERVED2
PDD[10]
PDIOW#
PDA[0]
SDD[12]
SDD[15]
GPIO[18]
OC0#
VSS VSS
TP[1]
RTCX2 VccRTC FERR# SERIRQ PDD[7] VSS PDD[3] PDD[0] PDDACK# VSS SDD[8] SDD[4] SDD[3] VSS SDA[1] VSS GPIO[19]
SMLINK[1]
RTCRST#
V5REF TP[3] Vcc3_3
INTRUDER#
VSS CLK48 APICD[0] SPKR PDD[8] PDD[4] PDD[13]
PDD[15] IRQ[14] PDIOR# SDD[9] SDD[11] SDD[13] Vcc3_3 IRQ[15] SDA[0]
GPIO[24]
VBIAS
PDD[14]
VSS TP[2] VSS VSS
VSS VSS NC[3] VSS APICCLK
PDD[9]
VSS
PDDREQ
PIORDY
PDCS3#
SDD[1]
VSS
V5REF
PDD[11]
PDD[2]
PDA[2]
SDD[7]
SDD[2]
SDDREQ
N
P
R
T
U
V
W
Y
AA
AB
AC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
POWER
MANAGEMENT
SMLINK
IDE
A8684-02
Advance Information Datasheet
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