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PDF IDTQS74FCT2244 Data sheet ( Hoja de datos )
| Número de pieza | IDTQS74FCT2244 | |
| Descripción | HIGH-SPEED SMOS 8-BIT BUFFER/LINE DRIVER | |
| Fabricantes | Integrated Device Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de IDTQS74FCT2244 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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IDTQS74FCT2244T/AT/CT
HIGH-SPEEDCMOS8-BITBUFFER/LINEDRIVER
HIGH-SPEED CMOS
8-BIT BUFFER/LINE
DRIVER
INDUSTRIALTEMPERATURERANGE
IDTQS74FCT2244T/AT/CT
FEATURES:
• CMOS power levels: <7.5mW static
• Undershoot clamp diodes on all inputs
• True TTL input and output compatibility
• Ground bounce controlled outputs
• Reduced output swing of 0 to 3.5V
• Built-in 25Ω series resistor outputs reduce reflection and other
system noise
• Std., A, and C speed grades with 4.1ns tPD for C
• IOL = 12mA
• Available in SOIC and QSOP packages
DESCRIPTION:
The IDTQS74FCT2244T is an 8-bit buffer/line driver with three-state
outputs and a 25Ω resistor, ideal for driving transmission lines and reducing
system noise. The 2244 series part can replace the 244 series to reduce
noise in an existing design. All inputs have clamp diodes for undershoot
noise suppression. All outputs have ground bounce suppression. Outputs
will not load an active bus when Vcc is removed from the device.
FUNCTIONAL BLOCK DIAGRAM
1
1G
1A1 2
1A2 4
1A3 6
8
1A4
19
2G
18 1Y1
2A1 11
16 1Y2
14
1Y3
12
1Y4
2A2 13
15
2A3
17
2A4
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
© 2000 Integrated Device Technology, Inc.
1
9 2Y1
7 2Y2
5
2Y3
3
2Y4
DECEMBER 2000
DSC-5398/1
1 page  
IDTQS74FCT2244T/AT/CT
HIGH-SPEEDCMOS8-BITBUFFER/LINEDRIVER
TEST CIRCUITS AND WAVEFORMS
INDUSTRIALTEMPERATURERANGE
VCC
VIN
Pulse
Generator
VOUT
D.U.T.
500Ω
50pF
500Ω
RT CL
FCTL link
Test Circuits for All Outputs
7.0V
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Switch
Closed
Open
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS CONTROL
PRESET
CLEAR
ETC.
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
tSU
tSU
tH
tREM
tH
Set-Up, Hold, and Release Times
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
FCTL link
LOW-HIGH-LOW
PULSE
HIGH-LOW-HIGH
PULSE
tW
Pulse Width
1.5V
1.5V
FCTL link
SAME PHASE
INPUT TRANSITION
OUTPUT
OPPOSITE PHASE
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
Propagation Delay
3V
1.5V
0V
VOH
1.5V
VOL
3V
1.5V
0V
FCTL link
CONTROL
INPUT
OUTPUT
NORMALLY
LOW
OUTPUT
NORMALLY
HIGH
ENABLE
DISABLE
3V
1.5V
tPZL
SWITCH
CLOSED
tPZH
3.5V
1.5V
tPLZ
tPHZ
SWITCH
OPEN
1.5V
0V
Enable and Disable Times
0V
3.5V
0.3V VOL
0.3V VOH
0V
FCTL link
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet IDTQS74FCT2244.PDF ] | |
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