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PDF DS1338 Data sheet ( Hoja de datos )
| Número de pieza | DS1338 | |
| Descripción | I2C RTC with 56-Byte NV RAM | |
| Fabricantes | Dallas Semiconducotr | |
| Logotipo |  |
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DS1338
I2C RTC with 56-Byte NV RAM
www.maxim-ic.com
GENERAL DESCRIPTION
The DS1338 serial real-time clock (RTC) is a low-
power, full binary-coded decimal (BCD)
clock/calendar plus 56 bytes of NV SRAM. Address
and data are transferred serially through an I2C™
interface. The clock/calendar provides seconds,
minutes, hours, day, date, month, and year
information. The end of the month date is
automatically adjusted for months with fewer than 31
days, including corrections for leap year. The clock
operates in either the 24-hour or 12-hour format with
AM/PM indicator. The DS1338 has a built-in power-
sense circuit that detects power failures and
automatically switches to the battery supply.
APPLICATIONS
Handhelds (GPS, POS Terminal)
Consumer Electronics (Set-Top Box, Digital
Recording, Network Appliance)
Office Equipment (Fax/Printer, Copier)
Medical (Glucometer, Medicine Dispenser)
Telecommunications (Router, Switcher, Server)
Other (Utility Meter, Vending Machine, Thermostat,
Modem)
TYPICAL OPERATING CIRCUIT
VCC
VCC RPU
RPU
CRYSTAL
VCC
CPU
RPU = tR / CB
X1
SCL
X2 VCC
SQW/OUT
DS1338
SDA
GND
VBAT
i
FEATURES
§ RTC Counts Seconds, Minutes, Hours, Date of
the Month, Month, Day of the Week, and Year
with Leap-Year Compensation Valid Up to 2100
§ Available in a Surface-Mount Package with an
Integrated Crystal (DS1338C)
§ 56-Byte Battery-Backed NV RAM for Data
Storage
§ I2C Serial Interface
§ Programmable Square-Wave Output Signal
§ Automatic Power-Fail Detect and Switch Circuitry
§ Underwriters Laboratory (UL) Recognized
ORDERING INFORMATION
PART
TEMP RANGE PIN-PACKAGE TOP MARK
DS1338Z-18 -40°C to +85°C 8 SO (150 mils) DS1338-18
DS1338Z-3 -40°C to +85°C 8 SO (150 mils) DS1338-3
DS1338Z-33
DS1338U-18
DS1338U-3
DS1338U-33
DS1338C-18
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
8 SO (150 mils)
8 mSOP
8 mSOP
8 mSOP
16 SO (300 mils)
DS1338-33
1338
rr-18
1338
rr-3
1338
rr-33
DS1338C-18
DS1338C-3 -40°C to +85°C 16 SO (300 mils) DS1338C-3
DS1338C-33 -40°C to +85°C 16 SO (300 mils) DS1338C-33
rr = second line, revision level
Pin Configurations appear at end of data sheet.
I2C is a trademark of Philips Corp. Purchase of I2C components from
Maxim Integrated Products, Inc., or one of its sublicensed Associated
Companies, conveys a license under the Philips I2C Patent Rights to
use these components in an I2C system, provided that the system
conforms to the I2C Standard Specification as defined by Philips.
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, go to: www.maxim-ic.com/errata.
1 of 15
REV: 091404
1 page  
Figure 2. Timing Diagram
DS1338 I2C RTC with 56-Byte NV RAM
Figure 3. Block Diagram
X1
OSCILLATOR AND
X2 DIVIDER
"C" VERSION
ONLY
POWER CONTROL
SCL
SDA
SERIAL BUS
INTERFACE AND
ADDRESS
REGISTER
1Hz/4.096kHz/8.192kHz/32.768kHz
1Hz
MUX/ SQW/OUT
BUFFER
CONTROL
LOGIC
Dallas
Semiconductor
DS1338
RAM
(56 x 8)
CLOCK,
CALENDAR,
AND CONTROL
REGISTERS
USER BUFFER
(7 BYTES)
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5 Page 
DS1338 I2C RTC with 56-Byte NV RAM
Control Register (07h)
The control register controls the operation of the SQW/OUT pin and provides oscillator status.
BIT 7
OUT
BIT 6
0
BIT 5
OSF
BIT 4
SQWE
BIT 3
0
BIT 2
0
BIT 1
RS1
BIT 0
RS0
Bit 7: Output Control (OUT). Controls the output level of the SQW/OUT pin when the square-wave output is
disabled. If SQWE = 0, the logic level on the SQW/OUT pin is 1 if OUT = 1; it is 0 if OUT = 0.
Bit 5: Oscillator Stop Flag (OSF). A logic 1 in this bit indicates that the oscillator has stopped or was stopped for
some time period and can be used to judge the validity of the clock and calendar data. This bit is edge triggered,
and is set to logic 1 when the internal circuitry senses the oscillator has transitioned from a normal run state to a
STOP condition. The following are examples of conditions that may cause the OSF bit to be set:
1) The first time power is applied.
2) The voltage present on VCC and VBAT are insufficient to support oscillation.
3) The CH bit is set to 1, disabling the oscillator.
4) External influences on the crystal (i.e., noise, leakage, etc.).
This bit remains at logic 1 until written to logic 0. This bit can only be written to logic 0. Attempting to write OSF to
logic 1 leaves the value unchanged.
Bit 4: Square-Wave Enable (SQWE). When set to logic 1, this bit enables the oscillator output to operate with
either VCC or VBAT applied. The frequency of the square-wave output depends upon the value of the RS0 and RS1
bits.
Bits 1 and 0: Rate Select (RS1 and RS0). These bits control the frequency of the square-wave output when the
square-wave output has been enabled. The table below lists the square-wave frequencies that can be selected
with the RS bits.
Square-Wave Output Frequency
RS1 RS0
00
01
10
11
SQW OUTPUT
FREQUENCY
1Hz
4.096kHz
8.192kHz
32.768kHz
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