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PDF DM562P Data sheet ( Hoja de datos )
| Número de pieza | DM562P | |
| Descripción | V.90 Integrated Data/ Fax/Voice/Speakerphone Modem Device Single Chip | |
| Fabricantes | Davicom | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de DM562P (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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DM562P
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
General Description
The DM562P integrated modem is a two-chipset
design that provides a complete solution for
state-of-the-art, voice-band Plain Old Telephone
Switching (POTS) communication. The modem
provides for Data (up to 56,000bps), Fax (up to
33,600bps), Voice and Full Duplex Speaker-phone
functions to comply with various international
standards.
The design of the DM562P is optimized for desktop
personal computer applications, embedded
microprocessor applications and Multi-Function
Peripheral (MFP) FAX application. It provides a low
cost, highly reliable, maximum integration, with the
minimum amount of support required. The DM562P
modem can operate over a dial-up network (PSTN)
or 2 wire leased lines.
The modem integrates auto dial and answer
capabilities, asynchronous data transmissions,
serial and parallel interfaces, various tone detection
schemes and data test modes.
The DM562P modem reference design is
pre-approved for FCC part 68 and provides
minimum design cycle time, with minimum cost to
insure the maximum amount of success.
The simplified modem system, shown in figure
below, illustrates the basic interconnection between
the MCU, DSP, AFE and other basic components of
a modem. The individual elements of the DM562P
are:
• DM6580 Analog Front End (AFE). 48-pin LQFP
package.
• DM6588 ITU-T V.90 integrated Processors with
32K bytes SRAM built in 128-pin QFP package
Block Diagram
Optional
29.4912MHz
PCI
Bus
ISA
Bus
LED
30.24MHz
Ring
Detector
Micro
Controller
Unit
TX
DSP
PnP 32KB
SRAM
UART
V.24
Interface
DM6588
RX
DSP
V.24
Interface
2M
Flash
SCLK
DIT
DOT
TFS
DIR
DOR
RFS
DM6580
RxIN
TxA1 DAA
Analog TxA2
Front End
Line
TXSCLK*2
RXSCLK
CLKIN
TXDCLK
RXDCLK
SPKR
Speaker
Driver
Microphone
Driver
Final
Version: DM562P-DS-F01
February 02, 2004
1
1 page  
DM6588 External Pin Configuration
DM562P
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
TEST4
UD0
UD1
UD2
UD3
GND
RXDCLK
UD4
UD5
UD6
UD7
VCC
RD_SP2
TXDCLK
GND
DSPTXD
OUTP3
OUTP2
OUTP1
OUTP0
RD_SP1
INP3
INP2
INP1
INP0
VDD
TEST2
TEST3
RESET
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
DM6588
External
102 D4
101 D5
100 D6
99 D7
98 CA0
97 CA1
96 CA2
95 CA3
94 VDD
93 CA4
92 CA5
91 CA6
90 CA7
89 GND
88 CA8
87 CA9
86 CA10
85 CA11
84 CA12
83 CA13
82 CA14
81 CA15
80 GND
79 SCLK
78 DSPRXD
77 GND_AUX
76 TXSCLK
75
74 VCC_AUX
73 /RD
72 /WR
71 /PSEN
70 RXSCLK
69 TXD
68 RXD
67 VDD
66 /LCS
65
Final
Version: DM562P-DS-F01
February 02, 2004
5
5 Page 
DM562P
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
DM6588 Pin Description-ISA Interface only
Pin No.
Pin Name
I/O
Description
2-5,
UD0-UD3,
I/O Data Bus Signal:
9-12
UD4-UD7
These signals are connected to the data bus of the PC (or Host) I/O.
They are used to transfer data between the PC and the DM6588.
22-24
UA0-UA2
I System Address:
These signals are connected to the bus of PC (or Host) I/O. They are used to
select the DM6588 offset UART I/O address.
29
/IOWB
I I/O Write:
An active low input signal used to write data to the DM6588.
30
/IORB
I I/O Read:
An active low input signal used to read data from the DM6588.
31
/CSN
I Address Enable:
This is an active low signal to enable the system address for DM6588.
36
/RST
I Reset:
An active low signal used to reset the DM6588.
78 IRQ O Interrupt Request:
The active pin will go high when an interrupt request is generated from the
DM6588.
Final
Version: DM562P-DS-F01
February 02, 2004
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet DM562P.PDF ] | |
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