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PDF PCA9548A Data sheet ( Hoja de datos )

Número de pieza PCA9548A
Descripción 8-channel I2C switch with reset
Fabricantes NXP Semiconductors 
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PCA9548A
8-channel I2C switch with reset
Rev. 01 — 15 April 2005
Product data sheet
1. General description
The PCA9548A is an octal bi-directional translating switch controlled via the I2C-bus. The
SCL/SDA upstream pair fans out to eight downstream pairs, or channels. Any individual
SCx/SDx channel or combination of channels can be selected, determined by the
contents of the programmable control register.
An active LOW reset input allows the PCA9548A to recover from a situation where one of
the downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets the
I2C-bus state machine and causes all the channels to be deselected as does the internal
Power-on reset function.
The pass gates of the switches are constructed such that the VDD pin can be used to limit
the maximum high voltage which will be passed by the PCA9548A. This allows the use of
different bus voltages on each pair, so that 1.8 V or 2.5 V or 3.3 V parts can communicate
with 5 V parts without any additional protection. External pull-up resistors pull the bus up
to the desired voltage level for each channel. All I/O pins are 5 V tolerant.
2. Features
s 1-of-8 bi-directional translating switches
s I2C-bus interface logic; compatible with SMBus standards
s Active LOW reset input
s 3 address pins allowing up to 8 devices on the I2C-bus
s Channel selection via I2C-bus, in any combination
s Power-up with all switch channels deselected
s Low Ron switches
s Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
s No glitch on power-up
s Supports hot insertion
s Low stand-by current
s Operating power supply voltage range of 2.3 V to 5.5 V
s 5 V tolerant inputs
s 0 Hz to 400 kHz clock frequency
s ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
s Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
s Three packages offered: SO24, TSSOP24, and HVQFN24

1 page




PCA9548A pdf
Philips Semiconductors
PCA9548A
8-channel I2C switch with reset
6.2 Pin description
Table 3:
Symbol
A0
A1
RESET
SD0
SC0
SD1
SC1
SD2
SC2
SD3
SC3
VSS
SD4
SC4
SD5
SC5
SD6
SC6
SD7
SC7
A2
SCL
SDA
VDD
Pin description
Pin
SO, TSSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
HVQFN
22
23
24
1
2
3
4
5
6
7
8
9 [1]
10
11
12
13
14
15
16
17
18
19
20
21
Description
address input 0
address input 1
active LOW reset input
serial data 0
serial clock 0
serial data 1
serial clock 1
serial data 2
serial clock 2
serial data 3
serial clock 3
supply ground
serial data 4
serial clock 4
serial data 5
serial clock 5
serial data 6
serial clock 6
serial data 7
serial clock 7
address input 2
serial clock line
serial data line
supply voltage
[1] HVQFN package die supply ground is connected to both the VSS pin and the exposed center pad. The VSS
pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and
board-level performance, the exposed pad needs to be soldered to the board using a corresponding
thermal pad on the board, and for proper heat conduction through the board thermal vias need to be
incorporated in the PCB in the thermal pad region.
9397 750 13297
Product data sheet
Rev. 01 — 15 April 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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PCA9548A arduino
Philips Semiconductors
PCA9548A
8-channel I2C switch with reset
8.5 Bus transactions
Data is transmitted to the PCA9548A control register using the Write mode as shown in
Figure 12.
slave address
control register
SDA S 1 1 1 0 A2 A1 A0 0 A B7 B6 B5 B4 B3 B2 B1 B0 A P
START condition
R/W acknowledge
from slave
acknowledge
from slave
STOP condition
002aab205
Fig 12. Write control register
Data is read from PCA9548A using the Read mode as shown in Figure 13.
slave address
control register
last byte
SDA S 1 1 1 0 A2 A1 A0 1 A B7 B6 B5 B4 B3 B2 B1 B0 NA P
START condition
Fig 13. Read control register
R/W acknowledge
from slave
no acknowledge
from master
STOP condition
002aab206
9397 750 13297
Product data sheet
Rev. 01 — 15 April 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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