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PDF KBE00F005A-D411 Data sheet ( Hoja de datos )
| Número de pieza | KBE00F005A-D411 | |
| Descripción | 512Mb NANDx2 + 256Mb Mobile SDRAMx2 | |
| Fabricantes | Samsung semiconductor | |
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KBE00F005A-D411
MCP MEMORY
MCP Specification
512Mb NAND*2 + 256Mb Mobile SDRAM*2
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,
AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL
INFORMATION IN THIS DOCUMENT IS PROVIDED
ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.
1. For updates or additional information about Samsung products, contact your nearest Samsung office.
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
applications where Product failure couldresult in loss of life or personal or physical harm, or any military or
defense application, or any governmental procurement to which special terms or provisions may apply.
* Samsung Electronics reserves the right to change products or specification without notice.
1 Revision 1.0
June 2005
1 page  
KBE00F005A-D411
PIN DESCRIPTION
Pin Name
CLK
CKE
CS,CS1
RAS
CAS
WEd
A0 ~ A12
BA0 ~ BA1
DQM0 ~ DQM3
DQ0 ~ DQ31
Vdd
Vddq
Vss
Vssq
Pin Function(Mobile SDRAM)
System Clock
Clock Enable
Chip Select
Row Address Strobe
Column Address Strobe
Write Enable
Address Input
Bank Address Input
Input/Output Data Mask
Data Input/Output
Power Supply
Data Out Power
Ground
DQ Ground
MCP MEMORY
Pin Name
CE
RE
WP
WEn
ALE
CLE
R/B
IO0 ~ IO7
Vcc
Vss
Pin Function(NAND Flash)
Chip Enable
Read Enable
Write Protection
Write Enable
Address Latch Enable
Command Latch Enable
Ready/Busy Output
Data Input/Output
Power Supply
Ground
Pin Name
NC
DNU
Pin Function
No Connection
Do Not Use
ORDERING INFORMATION
KB E 00 F 0 0 5 A - D 411
Samsung
MCP Memory(4chips)
Device Type
NAND + NAND + SDRAM+SDRAM
NOR Flash Density, Voltage,
Organization, Bank Size, Boot Block
00 = None
NAND Flash Density, Voltage, Organization
F = 512M+512M, 2.7V/2.7V, x8
UtRAM Density, Voltage, Organization
0 = None
SRAM Density, Voltage, Organization
0 = None
Access Time
411 : NAND Flash 50ns
NAND Flash 50ns
Mobile SDRAM 9ns
Mobile SDRAM 9ns
Package
D = FBGA(Lead-Free)
Version
A = 2nd Generation
SDRAM Interface, Density,
Voltage, Organization, Option
5 = M-SDR, 256M+256M, 1.8V/1.8V, x32
NOTE :
1. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life is potentially at stake.
Please contact to the memory marketing team in samsung electronics when considering the use of a product contained herein for any specific purpose,
such as medical, aerospace, nuclear, military, vehicular or undersea repeater use.
5 Revision 1.0
June 2005
5 Page 
KBE00F005A-D411
MCP MEMORY
Memory Map
The device is arranged in eight 128Mbit memory planes. Each plane contains 1,024 blocks and 528 byte page registers. This allows it
to perform simultaneous page program and block erase by selecting one page or block from each plane. The block address map is
configured so that multi-plane program/erase operations can be executed for every four sequential blocks by dividing the memory
array into plane 0~3 or plane 4~7 separately. For example, multi-plane program/erase operations into plane 2,3,4 and 5 are prohib-
ited.
Figure 3. Memory Array Map
Plane 0
(1024 Block)
Block 0
Page 0
Page 1
Plane 1
(1024 Block)
Block 1
Page 0
Page 1
Plane 2
(1024 Block)
Block 2
Page 0
Page 1
Plane 3
(1024 Block)
Block 3
Page 0
Page 1
Page 30
Page 31
Page 30
Page 31
Page 30
Page 31
Page 30
Page 31
Block 4092
Page 0
Page 1
Page 30
Page 31
528byte Page Registers
Plane 4
(1024 Block)
Block 4096
Page 0
Page 1
Page 30
Page 31
Block 4093
Page 0
Page 1
Page 30
Page 31
528byte Page Registers
Plane 5
(1024 Block)
Block 4097
Page 0
Page 1
Page 30
Page 31
Block 4094
Page 0
Page 1
Page 30
Page 31
528byte Page Registers
Plane 6
(1024 Block)
Block 4098
Page 0
Page 1
Page 30
Page 31
Block 4095
Page 0
Page 1
Page 30
Page 31
528byte Page Registers
Plane 7
(1024 Block)
Block 4099
Page 0
Page 1
Page 30
Page 31
Block 8188
Page 0
Page 1
Page 30
Page 31
528byte Page Registers
Block 8189
Page 0
Page 1
Page 30
Page 31
528byte Page Registers
Block 8190
Page 0
Page 1
Page 30
Page 31
528byte Page Registers
11
Block 8191
Page 0
Page 1
Page 30
Page 31
528byte Page Registers
Revision 1.0
June 2005
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet KBE00F005A-D411.PDF ] | |
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