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PDF UPA2718GR Data sheet ( Hoja de datos )
| Número de pieza | UPA2718GR | |
| Descripción | SWITCHING N- AND P-CHANNEL POWER MOS FET | |
| Fabricantes | NEC | |
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA2718GR
SWITCHING
P-CHANNEL POWER MOS FET
DESCRIPTION
The µ PA2718GR is P-Channel MOS Field Effect Transistor
designed for power management applications of notebook
computers and Li-ion battery protection circuit.
FEATURES
• Low on-state resistance
RDS(on)1 = 9.0 mΩ MAX. (VGS = −10 V, ID = −6.5 A)
RDS(on)2 = 14.5 mΩ MAX. (VGS = −4.5 V, ID = −6.5 A)
• Low Ciss: Ciss = 2810 pF TYP.
• Built-in gate protection diode
• Small and surface mount package (Power SOP8)
ORDERING INFORMATION
PART NUMBER
µ PA2718GR
PACKAGE
Power SOP8
PACKAGE DRAWING (Unit: mm)
85
1, 2, 3 : Source
4 : Gate
5, 6, 7, 8 : Drain
14
5.37 MAX.
6.0 ±0.3
4.4
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
0.5 ±0.2
0.8
0.10
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS
–30
V
Gate to Source Voltage (VDS = 0 V)
VGSS
m20
V
Drain Current (DC)
Drain Current (pulse) Note1
Total Power Dissipation Note2
Total Power Dissipation Note3
ID(DC)
ID(pulse)
PT1
PT2
m13
m130
2
2
A
A
W
W
Channel Temperature
Tch 150 °C
Storage Temperature
Single Avalanche Current Note4
Single Avalanche Energy Note4
Tstg –55 to +150 °C
IAS −13 A
EAS 16.9 mJ
EQUIVALENT CIRCUIT
Drain
Gate
Body
Diode
Gate
Protection
Diode
Source
Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1%
2. Mounted on ceramic substrate of 1200 mm2 x 2.2 mm
3. Mounted on glass epoxy board of 25.4 mm x 25.4 mm x 0.8 mm, PW = 10 sec
4. Starting Tch = 25°C, VDD = –15 V, RG = 25 Ω, L = 100 µH, VGS = –20 → 0 V
Remark The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage exceeding
the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. G16952EJ1V0DS00 (1st edition)
Date Published July 2004 NS CP(K)
Printed in Japan
2004
1 page  
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
20
VGS = −10 V
15 −4.5 V
−4 V
10
5
0
-50
ID = −6.5 A
Pulsed
0 50 100
Tch - Channel Temperature - °C
150
10000
1000
SWITCHING CHARACTERISTICS
VDD = −15 V
VGS = −10 V
RG = 10 Ω
td(off)
tf
100
tr
10 td(on)
1
-0.1
-1 -10
ID - Drain Current - A
-100
1000
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
Pulsed
100
10 VGS = −10 V
0V
1
0.1
0.01
0
0.2 0.4 0.6 0.8 1 1.2
VF(S-D) - Source to Drain Voltage - V
1.4
µ PA2718GR
CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE
10000
1000
Ciss
Coss
Crss
100
10
-0.1
VGS = 0 V
f = 1 MHz
-1 -10
VDS - Drain to Source Voltage - V
-100
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
-30 -15
ID = −13 A
VDD = −24 V
-20 −15 V
−6 V
-10
-10
0
0
VDS
VGS
20 40 60
QG - Gate Charge - nC
-5
0
80
1000
REVERSE RECOVERY TIME vs.
DIODE FORWARD CURRENT
VGS = 0 V
di/dt = 50 A/µs
100
10
0.1
1 10
IF - Diode Forward Current - A
100
Data Sheet G16952EJ1V0DS
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet UPA2718GR.PDF ] | |
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