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PDF 82845PE Data sheet ( Hoja de datos )

Número de pieza 82845PE
Descripción (82845GE / 82845PE) Memory Controller Hub
Fabricantes Intel 
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Intel® 845GE/845PE Chipset
Datasheet
Intel® 82845GE Graphics and Memory Controller Hub (GMCH) and
Intel® 82845PE Memory Controller Hub (MCH)
October 2002
Document Number: 251924-001

1 page




82845PE pdf
3.5.3
3.5.4
3.5.2.8 MLT1—Master Latency Timer Register (Device 1) ...........79
3.5.2.9 HDR1—Header Type Register (Device 1).........................80
3.5.2.10 PBUSN1—Primary Bus Number Register (Device 1) .......80
3.5.2.11 SBUSN1—Secondary Bus Number Register (Device 1)...80
3.5.2.12 SUBUSN1—Subordinate Bus Number Register
(Device 1) ..........................................................................81
3.5.2.13 SMLT1—Secondary Bus Master Latency Timer
Register (Device 1)............................................................81
3.5.2.14 IOBASE1—I/O Base Address Register (Device 1)............82
3.5.2.15 IOLIMIT1—I/O Limit Address Register (Device 1).............82
3.5.2.16 SSTS1—Secondary Status Register (Device 1) ...............83
3.5.2.17 MBASE1—Memory Base Address Register (Device 1) ....84
3.5.2.18 MLIMIT1—Memory Limit Address Register (Device 1) .....84
3.5.2.19 PMBASE1—Prefetchable Memory Base Address
Register (Device 1)............................................................85
3.5.2.20 PMLIMIT1—Prefetchable Memory Limit Address
Register (Device 1)............................................................85
3.5.2.21 BCTRL1—Bridge Control Register (Device 1) ..................86
3.5.2.22 ERRCMD1—Error Command Register (Device 1)............87
Integrated Graphics Device Registers (Device 2)
(Intel® 82845GE only) .......................................................................88
3.5.3.1 VID2—Vendor Identification Register (Device 2) ..............89
3.5.3.2 DID2—Device Identification Register (Device 2)...............89
3.5.3.3 PCICMD2—PCI Command Register (Device 2) ...............90
3.5.3.4 PCISTS2—PCI Status Register (Device 2) .......................91
3.5.3.5 RID2—Revision Identification Register (Device 2) ............91
3.5.3.6 CC—Class Code Register (Device 2) ...............................92
3.5.3.7 CLS—Cache Line Size Register (Device 2) ......................92
3.5.3.8 MLT2—Master Latency Timer Register (Device 2) ...........92
3.5.3.9 HDR2—Header Type Register (Device 2).........................93
3.5.3.10 GMADR —Graphics Memory Range Address
Register (Device 2)............................................................93
3.5.3.11 MMADR—Memory Mapped Range Address
Register (Device 2)............................................................94
3.5.3.12 SVID2—Subsystem Vendor Identification
Register (Device 2)............................................................94
3.5.3.13 SID2—Subsystem Identification Register (Device 2) ........94
3.5.3.14 ROMADR—Video BIOS ROM Base Address
Registers (Device 2) ..........................................................95
3.5.3.15 CAPPOINT—Capabilities Pointer Register (Device 2)......95
3.5.3.16 INTRLINE—Interrupt Line Register (Device 2)..................95
3.5.3.17 INTRPIN—Interrupt Pin Register (Device 2) .....................96
3.5.3.18 MINGNT—Minimum Grant Register (Device 2) ................96
3.5.3.19 MAXLAT—Maximum Latency Register (Device 2)............96
3.5.3.20 PMCAPID—Power Management Capabilities ID
Register (Device 2)............................................................96
3.5.3.21 PMCAP—Power Management Capabilities
Register (Device 2)............................................................97
3.5.3.22 PMCS—Power Management Control/Status
Register (Device 2)............................................................97
Device 6 Registers ............................................................................98
3.5.4.1 DWTC—DRAM Write Throttling Control
Register (Device 6)............................................................98
3.5.4.2 DRTC—DRAM Read Throttling Control
Register (Device 6)............................................................99
Intel® 82845GE/82845PE Datasheet
5

5 Page





82845PE arduino
Intel® 82845GE GMCH / 82845PE MCH
Features
I Host Interface Support
— One processor in a mPGA478 package
— Hyper-Threading Technology support
— 400/533 MHz PSB (100/133 MHz bus clock)
— PSB Dynamic Bus Inversion on the data bus
— 32-bit addressing for access to 4 GB of memory space
— 8 deep In Order Queue
— AGTL+ On-die Termination
I System Memory Controller
— One 64-bit wide DDR SDRAM data channel
— Up to 2.0 GB of 266/333 MHz DDR SDRAM
— Bandwidth up to 2.7 GB/s (DDR333)
— 64-Mb, 128-Mb, 256-Mb, and 512-Mb SDRAM
technologies
— Supports only x8 and x16 SDRAM devices with four
banks
— Unbuffered, unregistered 184-pin non-ECC DDR
SDRAM DIMMs only
— Two DDR DIMMs, single-sided and/or double-sided
— Does not support double-sided x16 DDR DIMMs
— JEDEC DDR DIMM specification configurations only
— Opportunistic refresh
— Up to 16, simultaneously open pages
— SPD (Serial Presence Detect) scheme for DIMM
detection
— Suspend-to-RAM support using CKE
— Selective Command-Per-Clock (selective CPC) accesses
I Hub Interface
— Supports Hub Interface 1.5
— 266 MB/s point-to-point Hub Interface to the ICH4
— 66 MHz base clock
— 1.5 V operation
I AGP Interface
— Supports a single 1.5 V Accelerated Graphics Port
Interface, Specification 2.0-compliant device
— Supports 1X/2X/4X data transfers and 2X/4X Fast
Writes
— 32-deep AGP request queue
— AGP signals muxed with two Intel® DVO ports:
Supports ADD cards (82845GE only)
I Integrated Graphics (82845GE only)
— Core Frequency of 266 MHz
— 3D Setup and Render Engine
- Discrete Triangles, Strips and Fans Support
- Indexed Vertex and Flexible Vertex Formats
- Pixel Accurate Fast Scissoring and Clipping Operation
- Backface Culling Support
- Supports D3D and OGL Pixelization Rules
- Anti-Aliased Lines Support
- Sprite Points Support
— High Quality Texture Engine (see Section 1.4.5)
— 3D Graphics Rasterization Enhancements (see
Section 1.4.5)
— 2D Graphics (see Section 1.4.5)
— Video DVD/PC-VCR (see Section 1.4.5)
— Video Overlay (see Section 1.4.5)
I Analog Display Support (82845GE only)
— 350 MHz Integrated 24-bit RAMDAC
— Up to 2048x1536 at 60 Hz refresh
— Hardware Color Cursor Support
— DDC2B Compliant Interface
I Digital Display Channels (82845GE only)
— Two channels multiplexed with AGP
— 165 MHz dot clock on each 12-bit interface
— Can combine two, 12-bit channels to form one 24-bit
interface: Supports flat panels up to 2048x1536 at 60 Hz
or dCRT/HDTV at 1920x1080 at 85 Hz
— Supports Hot Plug and Display
— Supports LVDS, TMDS transmitters or TV-out encoders
— ADD card utilizes AGP connector
— Three Display Control interfaces (I2C/DDC)
multiplexed on AGP
I Package
— 37.5 mm x 37.5 mm FC-BGA package with 1 mm ball
pitch
Intel® 82845GE/82845PE Datasheet
11

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