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Número de pieza | ICX285AQ | |
Descripción | Progressive Scan CCD Image Sensor with Square Pixel for Color Cameras | |
Fabricantes | Sony Corporation | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de ICX285AQ (archivo pdf) en la parte inferior de esta página. Total 23 Páginas | ||
No Preview Available ! ICX285AQ
Diagonal 11mm (Type 2/3) Progressive Scan CCD Image Sensor with Square Pixel for Color Cameras
Description
The ICX285AQ is a diagonal 11mm (Type 2/3)
interline CCD solid-state image sensor with a square
pixel array. High sensitivity and low smear are
achieved through the adoption of EXview HAD CCD
technology. Progressive scan allows all pixels'
signals to be output independently within approximately
1/15 second. Also, the adoption of high frame rate
readout mode supports 60 frames per second. This
chip features an electronic shutter with variable
charge-storage time which makes it possible to realize
full-frame still images without a mechanical shutter.
High resolution and high color reproductively are
achieved through the use of R, G, B primary color
mosaic filters.
This chip is suitable for image input applications
such as still cameras which requires high resolution,
etc.
20 pin DIP (Ceramic)
Features
• Progressive scan allows individual readout of the image signals from all pixels.
• High horizontal and vertical resolution (both approximately 800 TV-lines) still images without a mechanical
shutter
• Supports high frame rate readout mode
(effective 256 lines output, 60 frames/s)
• Square pixel
• Aspect ratio : 4:3
Pin 1
2
• Horizontal drive frequency: 28.64MHz
• R, G, B primary color mosaic filters on chip
V
• High sensitivity, low smear
• Low dark current, excellent anti-blooming characteristics
• Continuous variable-speed shutter function
• Horizontal register: 5.0V drive
2
Pin 11
H
8
40
Device Structure
• Interline CCD image sensor
• Image size:
Diagonal 11mm (Type 2/3)
• Total number of pixels: 1434 (H) × 1050 (V) approx. 1.50M pixels
Optical black position
(Top View)
• Number of effective pixels: 1392 (H) × 1040 (V) approx. 1.45M pixels
• Number of active pixels: 1360 (H) × 1024 (V) approx. 1.40M pixels
• Chip size:
10.2mm (H) × 8.3mm (V)
• Unit cell size:
6.45µm (H) × 6.45µm (V)
• Optical black:
Horizontal (H) direction: Front 2 pixels, rear 40 pixels
Vertical (V) direction: Front 8 pixels, rear 2 pixels
• Number of dummy bits: Horizontal 20
Vertical 3
• Substrate material:
Silicon
TM
∗ EXview HAD CCD is a trademark of Sony Corporation.
EXview HAD CCD is a CCD that drastically improves light efficiency by including near infrared light region as a basic structure of
HAD (Hole-Accumulation-Diode) sensor.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E01420A27
1 page ICX285AQ
Clock Equivalent Circuit Constants
Item
Symbol Min.
Typ. Max. Unit Remarks
CφV1
5600
pF
Capacitance between vertical transfer clock and
GND
CφV2A
CφV2B
CφV3
6800
22000
8200
pF
pF
pF
CφV4
22000
pF
CφV12A
150 pF
CφV12B
390 pF
CφV2A3
270 pF
Capacitance between vertical transfer clocks
CφV2B3
CφV14
470
2200
pF
pF
CφV34
330 pF
CφV2A4
390 pF
CφV2B4
560 pF
Capacitance between horizontal transfer clock
and GND
CφH1
CφH2
47 pF
39 pF
Capacitance between horizontal transfer clocks CφHH
74 pF
Capacitance between reset gate clock and GND CφRG
4 pF
Capacitance between substrate clock and GND CφSUB
1300
pF
R1, R3
30 Ω
Vertical transfer clock series resistor
R2A, R2B
32
Ω
R4 20 Ω
Vertical transfer clock ground resistor
RGND
60 Ω
Horizontal transfer clock series resistor
RφH
7.5 Ω
Reset gate clock ground resistor
RφRG
24 Ω
Vφ4
CφV12B
Vφ1 R1
CφV4
CφV41
R4
CφV34
CφV2B4
CφV2B
R2B
Vφ2B
RφH
Hφ1
RφH
Hφ1
CφHH
CφH1
RφH
RφH
CφH2
Hφ2
Hφ2
CφV1
CφV12A
RGND
CφV2A4
Vφ2A
CφV2A3
R2A
CφV2A
CφV2B3
CφV3
R3
Vφ3
Horizontal transfer clock equivalent circuit
RGφ
RφRG
CφRG
Vertical transfer clock equivalent circuit
–5–
Reset gate clock equivalent circuit
5 Page Readout modes
The output methods for the following two readout modes are shown below.
Progressive scan mode
High frame rate readout mode
VOUT
16 G
15 R
14 G
13 R
12 G
11 R
10 G
9R
8G
7R
6G
5R
4G
3R
2G
1R
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
VOUT
16 G
15 R
14 G
13 R
12 G
11 R
10 G
9R
8G
7R
6G
5R
4G
3R
2G
1R
B
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
ICX285AQ
Note) Blacked out portions in the diagram indicate pixels which are not read out.
Output starts from line 1 in high frame readout modes.
1. Progressive scan mode
In this mode, all pixels' signals are output in non-interlace format in 1/15s.
All pixels' signals within the same exposure period are read out simultaneously, making this mode suitable
for high resolution image capturing.
2. High frame rate readout mode
All effective areas are scanned in approximately 1/60s by reading out two out of eight lines (1st and 4th
lines, 9th and 12th lines, and so on). The vertical resolution is approximately 256 TV-lines. This readout
mode emphasizes processing speed over vertical resolution.
– 11 –
11 Page |
Páginas | Total 23 Páginas | |
PDF Descargar | [ Datasheet ICX285AQ.PDF ] |
Número de pieza | Descripción | Fabricantes |
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