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Philips Semiconductors
PowerMOS transistors
Avalanche energy rated
Product specification
IRFP460
FEATURES
• Repetitive Avalanche Rated
• Fast switching
• Stable off-state characteristics
• High thermal cycling performance
• Low thermal resistance
SYMBOL
g
d
s
QUICK REFERENCE DATA
VDSS = 500 V
ID = 20 A
RDS(ON) ≤ 0.27 Ω
GENERAL DESCRIPTION
N-channel, enhancement mode
field-effect power transistor,
intended for use in off-line switched
mode power supplies, T.V. and
computer monitor power supplies,
d.c. to d.c. converters, motor control
circuits and general purpose
switching applications.
The IRFP460 is supplied in the
SOT429 (TO247) conventional
leaded package.
PINNING
PIN DESCRIPTION
1 gate
2 drain
3 source
tab drain
SOT429 (TO247)
1 23
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
ID
IDM
PD
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Continuous drain current
Pulsed drain current
Total dissipation
Operating junction and
storage temperature range
Tj = 25 ˚C to 150˚C
Tj = 25 ˚C to 150˚C; RGS = 20 kΩ
Tmb = 25 ˚C; VGS = 10 V
Tmb = 100 ˚C; VGS = 10 V
Tmb = 25 ˚C
Tmb = 25 ˚C
MIN.
-
-
-
-
-
-
-
- 55
MAX.
500
500
± 30
20
12.4
80
250
150
UNIT
V
V
V
A
A
A
W
˚C
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
EAS
EAR
IAS, IAR
Non-repetitive avalanche
Unclamped inductive load, IAS = 20 A;
energy
tp = 0.2 ms; Tj prior to avalanche = 25˚C;
Repetitive avalanche energy1
VDD ≤ 50 V; RGS = 50 Ω; VGS = 10 V
IAR = 20 A; tp = 2.5 µs; Tj prior to
avalanche = 25˚C; RGS = 50 Ω; VGS = 10 V
Repetitive and non-repetitive
avalanche current
MIN.
-
-
-
MAX.
1300
32
20
UNIT
mJ
mJ
A
1 pulse width and repetition rate limited by Tj max.
September 1999
1
Rev 1.000
Philips Semiconductors
PowerMOS transistors
Avalanche energy rated
Product specification
IRFP460
Gate-source voltage, VGS (V)
15
PHW20N50E
14 ID = 20A
13
12
Tj = 25 C
300V
11
10
9 200V
8
7
VDD = 400 V
6
5
4
3
2
1
0
0 25 50 75 100 125 150 175 200
Gate charge, QG (nC)
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG); parameter VDS
Source-Drain Diode Current, IF (A)
50
45 VGS = 0 V
PHW20N50E
40
35
30
25
150 C
Tj = 25 C
20
15
10
5
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5
Drain-Source Voltage, VSDS (V)
Fig.16. Source-Drain diode characteristic.
IF = f(VSDS); parameter Tj
Switching times, td(on), tr, td(off), tf (ns)
600
500
PHW20N50E
td(off)
400
300
tr, tf
200
100 td(on)
0
0 5 10 15 20 25 30
Gate resistance, RG (Ohms)
Fig.14. Typical switching times; td(on), tr, td(off), tf = f(RG)
Normalised Drain-source breakdown voltage
1.15
V(BR)DSS @ Tj
V(BR)DSS @ 25 C
1.1
1.05
1
0.95
0.9
0.85
-100
-50 0 50 100
Tj, Junction temperature (C)
150
Fig.15. Normalised drain-source breakdown voltage;
V(BR)DSS/V(BR)DSS 25 ˚C = f(Tj)
Non-repetitive Avalanche current, IAS (A)
100
Tj prior to avalanche = 25 C
10
VDS
125 C
ID
1
1E-06
tp
PHW20N50E
1E-05
1E-04
1E-03
Avalanche time, tp (s)
1E-02
Fig.17. Maximum permissible non-repetitive
avalanche current (IAS) versus avalanche time (tp);
unclamped inductive load
Maximum Repetitive Avalanche Current, IAR (A)
100
Tj prior to avalanche = 25 C
10
125 C
1
0.1
1E-06
PHW20N50E
1E-05
1E-04
1E-03
Avalanche time, tp (s)
1E-02
Fig.18. Maximum permissible repetitive avalanche
current (IAR) versus avalanche time (tp)
September 1999
5
Rev 1.000