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Número de pieza | DS1000 | |
Descripción | 5-Tap Silicon Delay Line | |
Fabricantes | Dallas Semiconducotr | |
Logotipo | ||
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DS1000
5-Tap Silicon Delay Line
FEATURES
All-silicon time delay
5 taps equally spaced
Delays are stable and precise
Both leading and trailing edge accuracy
Delay tolerance ±5% or ±2 ns, whichever is
greater
Low-power CMOS
TTL/CMOS-compatible
Vapor phase, IR and wave solderable
Custom delays available
Fast turn prototypes
Extended temperature range available
(DS1000-IND)
PIN ASSIGNMENT
IN
NC
NC
TAP 2
NC
TAP 4
GND
1
2
3
4
5
6
7
14 VCC
13 NC
IN 1
TAP 2 2
12 TAP 1
TAP 4 3
11 NC
GND 4
10 TAP 3
8 VCC
7 TAP 1
6 TAP 3
5 TAP 5
9 NC
DS1000M 8-Pin DIP (300-mil)
See Mech. Drawings Section
8 TAP 5
DS1000 14-Pin DIP (300-mil) IN
See Mech. Drawings Section TAP 2
1
2
8 VCC
7 TAP 1
TAP 4 3
6 TAP 3
GND 4
5 TAP 5
DS1000Z 8-Pin SOIC (150-mil)
See Mech. Drawings Section
PIN DESCRIPTION
TAP 1-TAP 5 - TAP Output Number
VCC - +5 Volts
GND
- Ground
NC - No Connection
IN - Input
DESCRIPTION
The DS1000 series delay lines have five equally spaced taps providing delays from 4 ns to 500 ns. These
devices are offered in a standard 14-pin DIP that is pin-compatible with hybrid delay lines. Alternatively,
8-pin DIPs and surface mount packages are available to save PC board area. Low cost and superior
reliability over hybrid technology is achieved by the combination of a 100% silicon delay line and
industry standard DIP and SOIC packaging. In order to maintain complete pin compatibility, DIP
packages are available with hybrid lead configurations. The DS1000 series delay lines provide a nominal
accuracy of ±5% or ±2 ns, whichever is greater. The DS1000 5-Tap Silicon Delay Line reproduces the
input logic state at the output after a fixed delay as specified by the extension of the part number after the
dash. The DS1000 is designed to reproduce both leading and trailing edges with equal precision. Each
tap is capable of driving up to ten 74LS loads. Dallas Semiconductor can customize standard products to
meet special needs. For special requests and rapid delivery, call 972-371-4348.
1 of 5
111799
1 page TEST CONDITIONS
DS1000
INPUT:
Ambient Temperature:
Supply Voltage (VCC):
Input Pulse:
Source Impedance:
Rise and Fall Time:
Pulse Width:
Period:
25°C ±=3°C
5.0V ±=0.1V
High = 3.0V ±=0.1V
Low = 0.0V ±=0.1V
50 ohm Max.
3.0 ns Max. (measured between 0.6V and 2.4V)
500 ns (1 µs for -500)
1 µs (2 µs for -500)
OUTPUT:
Each output is loaded with the equivalent of one 74F04 input gate. Delay is measured at the 1.5V level on
the rising and falling edge.
NOTE:
Above conditions are for test only and do not restrict the operation of the device under other data sheet
conditions.
5 of 5
5 Page |
Páginas | Total 5 Páginas | |
PDF Descargar | [ Datasheet DS1000.PDF ] |
Número de pieza | Descripción | Fabricantes |
DS1000 | 5-Tap Silicon Delay Line | Dallas Semiconducotr |
DS1003 | 4-Tap Silicon Delay Line for RISC Applications | Dallas Semiconductor |
DS1004 | 5-Tap High Speed Silicon Delay Line | Dallas Semiconducotr |
DS1005 | 5-Tap Silicon Delay Line | Dallas Semiconducotr |
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