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PDF TC11IB Data sheet ( Hoja de datos )
| Número de pieza | TC11IB | |
| Descripción | 32-Bit Single-Chip Microcontroller | |
| Fabricantes | Infineon | |
| Logotipo |  |
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Data Sheet, V2.3, Nov. 2003
TC11IB
32-Bit Single-Chip Microcontroller
Microcontrollers
Never stop thinking.
1 page  
32-Bit Single-Chip Microcontroller
TriCore Family
TC11IB
Advance Information
• High Performance 32-bit TriCore CPU with 4-Stage Pipeline running at 96MHz Clock
• Dual Issue super-scalar implementation
– MAC Instruction maximum triple issue
• Circular Buffer and bit-reverse addressing modes for DSP algorithms
• Flexible multi-master interrupt system
• Very fast interrupt response time
• Hardware controlled context switch for task switch and interrupts
• Windows CE compliant Memory Management Unit (MMU)
• 64 kByte of on-chip SRAM for data and time critical code
• Independent Peripheral Control Processor (PCP) for low level driver support with
20 kByte code / parameter memory
• eDRAM Local Memory Unit (LMU) with 512 KBytes Code/data Memory.
• ComDRAM with 1MBytes DRAM Memory
• High Performance Local Memory Bus (LMB) for fast access between Caches and on-
local memories and Fast-FPI Interface.
• Two On-chip Flexible Peripheral Interface Buses (Fast FPI Bus and Slow FPI Bus) for
interconnections of functional units
• Flexible External Bus Interface Unit (EBU) used for communication with external data
memories such as PC 100 SDRAM, Burst Flash and SRAM etc. and external
peripheral units, including Intel style and Motorola style peripherals.
• On-Chip Peripheral Units
– Two Multifunctional General Purpose Timer Units (GPTU0 & GPTU1) with three 32-
bit timer/counters each
– Asynchronous/Synchronous Serial Channels (ASC) with IrDA data transmission,
receive/transmit FIFOs, parity, framing and overrun error detection
– High Speed Synchronous Serial Channels (SSC) with programmable data length
and shift direction
– Asynchronous Serial Interface (16X50) with programmable XON/XOFF characters,
Baudrate generator, receive/transmit FIFOs and standard modem interface
support.
– 16 MHz MultiMediaCard Interface (MMCI), a glueless interface to MultiMediaCard
Bus, with bus clock generation, CRC protection and up to 2 MByte/s data
communication.
– Fast Ethernet Controller with 10/100 Mbps MII-Based physical devices support.
– PCI V2.2 Interface with PCI Bus Power Management and DMA data transfer.
– Watchdog Timer and System Timer
• Six 16-bit digital I/O ports
• On-Chip Debug Support (OCDS)
Data Sheet
1 V2.3, 2003-11
5 Page 
TC11IB
Table 1
Symbol
P1
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P1.8
P1.9
P1.10
P1.11
P1.12
P1.13
P1.14
P1.15
Pin Definitions and Functions(cont’d)
Pin In PU/ Functions
Out PD1)
I/O Port 1
Port 1 serves as 16-bit general purpose I/O port, which
also is used as input/output for the serial interfaces
(SSC,ASC,16X50) and MultiMediaCard Interface
(MMCI)
A7 I/O PUC SCLK
SSC clock input/output line
B7 I/O PUC MRST
SSC master receive / slave transmit
input/output
C7 I/O PUC MTSR
SSC master transmit / slave receive
input/output
D7 O PUC MMCI_CLK MMCI clock output line
A6 I/O PUC MMCI_CMD MMCI command input/output line
B6 I/O PUC MMCI_DAT MMCI data input/output line
C6 I/O PUC ASC_RXD ASC receiver input/output line
A5 O PUC ASC_TXD ASC transmitter output line
B5 I PUC 16X50_RXD 16X50 receiver input line
C5 O PUC 16X50_TXD 16X50 transmitter output line
D5 O PUC 16X50_RTS 16X50 request to send output line
A4 I PUC 16X50_DCD 16X50 data carrier detection input line
C4 I PUC 16X50_DSR 16X50 data set ready input line
A3 O PUC 16X50_DTR 16X50 data terminal ready output line
B3 I PUC 16X50_CTS 16X50 clear to send input line
A2 I PUC 16X50_RI 16X50 ring indicator input line
Data Sheet
7 V2.3, 2003-11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet TC11IB.PDF ] | |
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