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PDF UPD1724x Data sheet ( Hoja de datos )
| Número de pieza | UPD1724x | |
| Descripción | 4 Bit Single-Chip Microcontrollers | |
| Fabricantes | NEC | |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD17240,17241,17242,17243,17244,17245,17246
4-BIT SINGLE-CHIP MICROCONTROLLERS
FOR SMALL GENERAL-PURPOSE INFRARED
REMOTE CONTROL TRANSMITTERS
DESCRIPTION
The µPD17240, 17241, 17242, 17243, 17244, 17245, 17246 (hereafter called the µPD17246 Subseries) are 4-
bit single-chip microcontrollers for small general-purpose infrared remote control transmitters.
This subseries employs 17K general-purpose register system architecture for the CPU, and can directly execute
operations between data memories instead of the conventional method of executing operations through an
accumulator. Moreover, all the instructions are 16-bit/1-word instructions, enabling efficient programming.
In addition, a one-time PROM model, the µPD17P246, to which data can be written only once, is also available.
This product is convenient either for evaluating the µPD17246 Subseries programs or for small-scale production of
application systems.
Detailed function descriptions are provided in the following user's manual. Be sure to read them before
designing.
µPD172×× Subseries User's Manual: U12795E
FEATURES
• Infrared remote controller carrier generator (REM output)
• 17K architecture: General-purpose register system
• Program memory (ROM), data memory (RAM)
µPD17240 µPD17241 µPD17242 µPD17243 µPD17244 µPD17245 µPD17246
Program
4 KB
8 KB
12 KB
16 KB
20 KB
24 KB
32 KB
memory (ROM) (2,048 × 16) (4,096 × 16) (6,144 × 16) (8,192 × 16) (10,240 × 16) (12,288 × 16) (16,384 × 16)
Data memory 447 × 4 bits
(RAM)
• 8-bit timer:
1 channel
• Basic interval timer/watchdog timer: 1 channel
• Instruction execution time (can be changed in two steps)
@ fX = 4 MHz:
4 µs (high-speed mode)/8 µs (normal mode)
• External interrupt pin (INT/P1B0): 1
• I/O pins:
24
• Supply voltage:
VDD = 2.0 to 3.6 V
• On-chip RAM retention detector
• Low-voltage detector (mask option)
Unless otherwise specified, the µPD17246 is treated as the representative model throughout this document.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. U15002EJ1V0DS00 (1st edition)
Date Published April 2003 N CP (K)
Printed in Japan
The mark shows major revised points.
c
1 page  
µPD17240, 17241, 17242, 17243, 17244, 17245, 17246
PIN CONFIGURATION (TOP VIEW)
• 30-pin plastic SSOP (7.62 mm (300))
µPD17240MC-×××-5A4, 17241MC-×××-5A4, 17242MC-×××-5A4, 17243MC-×××-5A4,
µPD17244MC-×××-5A4, 17245MC-×××-5A4, 17246MC-×××-5A4
P0D2
P0D3
P1B0/INT
P0E0
P0E1
P0E2
P0E3
REM
VDD
XOUT
XIN
GND
RESET
P1A0
P1A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
30 P1A2
29 P0D1
28 P0D0
27 P0C3
26 P0C2
25 P0C1
24 P0C0
23 P0B3
22 P0B2
21 P0B1
20 P0B0
19 P0A3
18 P0A2
17 P0A1
16 P0A0
GND:
Ground
INT: External interrupt request signal input
P0A0 to P0A3: Input port (CMOS input with pull-up resistor)
P0B0 to P0B3: I/O port (CMOS input with pull-up resistor/N-ch open-drain output)
P0C0 to P0C3: I/O port (CMOS input with pull-up resistor/N-ch open-drain output)
P0D0 to P0D3: I/O port (CMOS input with pull-up resistor/N-ch open-drain output)
P0E0 to P0E3: I/O port (when key matrix is used: CMOS input with pull-up resistor/N-ch open-
drain output, when key matrix is not used: CMOS input/push-pull output)
P1A0/P1A2: Input port (when key matrix is used: CMOS input/N-ch open-drain output, when
key matrix is not used: CMOS input/push-pull output)
P1B0:
Input port (CMOS input)
REM:
Remote controller output (CMOS push-pull output)
RESET:
Reset input
VDD:
Power supply
XIN, XOUT:
Resonator connection
Data Sheet U15002EJ1V0DS
5
5 Page 
µPD17240, 17241, 17242, 17243, 17244, 17245, 17246
1.1 Pin Function List (3/3)
Pin No.
14
15
30
16
17
18
19
20
21
22
23
24
25
26
27
Pin Name
P1A0
P1A1
P1A2
P0A0
P0A1
P0A2
P0A3
P0B0
P0B1
P0B2
P0B3
P0C0
P0C1
P0C2
P0C3
Function
Output Format After Reset
These pins constitute a 3-bit I/O port that can be set to the input or When key
output mode in 1-bit units.
matrix is
If this port is set to the input mode when a key matrix is used, it used: N-ch
functions as a CMOS input port and can be used to input key open-drain,
return signals. At this time, whether a pull-up/down resistor is when key
connected to this port and the standby mode release condition matrix is not
(whether it is released when this pin is high or low) can be
used: CMOS
selected in 1-bit units
push-pull.
1. If connection of a resistor is specified and if it is specified that
the standby mode is released when this port goes low
... A pull-up resistor is connected. If a low level is input to
the set key, the standby mode is released.
2. If connection of a resistor is specified and if it is specified that
the standby mode is released when this port goes high
... A pull-down resistor is connected. If a high level is input
to the set key, the standby mode is released.
3. If connection of a resistor is not specified and if it is specified
that the standby mode is released when this port goes low
(or high)
... No resistor is connected. If a low (or high) level is input to
the set key, the standby mode is released.
If this port is set to the output mode when a key matrix is used, it
functions as an N-ch open-drain output port and can be used to
output key matrix signals.
If this port is set to the input mode when a key matrix is used, it
functions as a CMOS input port.
Connection of a resistor to this port and whether the resistor is
pull-up or pull-down can be selected in 1-bit units.
If this port is set in the output mode when a key matrix is not used,
it functions as a high-current CMOS output port.
CMOS input
(when key
matrix is not
used and
no resistor
connected)
These pins are CMOS input pins with a 4-bit pull-up resistor.
They can be used to input the key return signals of a key matrix.
If any one of these pins goes low, the standby status is released.
– CMOS input
with pull-up
resistor
These pins constitute a 4-bit I/O port that can be set to the input or
output mode in 1-bit units.
In the input mode, these pins are CMOS input pins with a pull-up
resistor, and can be used to input the key return signals of a key
matrix. The standby status is released when at least one of these
pins goes low.
In the output mode, they serve as N-ch open-drain output pins and
can be used to output the key return signals of a key matrix.
N-ch
open drain
These pins constitute a 4-bit I/O port that can be set to the input or
output mode in 4-bit units (group I/O).
In the input mode, these pins are CMOS input pins with a pull-up
resistor, and can be used to input the key return signals of a key
matrix. The standby status is released when at least one of these
pins goes low.
In the output mode, they serve as N-ch open-drain output pins and
can be used to output the key return signals of a key matrix.
N-ch
open drain
CMOS input
with pull-up
resistor
Low-level
output
Data Sheet U15002EJ1V0DS
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet UPD1724x.PDF ] | |
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