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PDF ICM7217 Data sheet ( Hoja de datos )
| Número de pieza | ICM7217 | |
| Descripción | 4-Digit LED Display / Programmable Up/Down Counter | |
| Fabricantes | Intersil | |
| Logotipo |  |
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ICM7217
August 1997
4-Digit LED Display,
Programmable Up/Down Counter
Features
Description
• Four Decade, Presettable Up-Down Counter with
Parallel Zero Detect
• Settable Register with Contents Continuously
Compared to Counter
• Directly Drives Multiplexed 7 Segment Common
Anode or Common Cathode LED Displays
• On-Board Multiplex Scan Oscillator
• Schmitt Trigger On Count Input
• TTL Compatible BCD I/O Port, Carry/Borrow, Equal,
and Zero Outputs
• Display Blank Control for Lower Power Operation;
Quiescent Power Dissipation <5mW
• All Terminals Fully Protected Against Static Discharge
• Single 5V Supply Operation
The ICM7217 is a four digit, presettable up/down counter with
an onboard presettable register continuously compared to the
counter. The ICM7217 is intended for use in hard-wired
applications where thumbwheel switches are used for loading
data, and simple SPDT switches are used for chip control.
This circuit provides multiplexed 7 segment LED display
outputs, with common anode or common cathode
configurations available. Digit and segment drivers are
provided to directly drive displays of up to 0.8 inch
character height (common anode) at a 25% duty cycle. The
frequency of the onboard multiplex oscillator may be
controlled with a single capacitor, or the oscillator may be
allowed to free run. Leading zeros can be blanked. The
data appearing at the 7 segment and BCD outputs is
latched; the content of the counter is transferred into the
latches under external control by means of the Store pin.
The ICM7217 (common anode) and ICM7217A (common
cathode) versions are decade counters, providing a
maximum count of 9999, while the ICM7217B (common
anode) and ICM7217C (common cathode) are intended for
timing purposes, providing a maximum count of 5959.
This circuit provides 3 main outputs; a CARRY/BORROW
output, which allows for direct cascading of counters, a
ZERO output, which indicates when the count is zero, and
an EQUAL output, which indicates when the count is equal
to the value contained in the register. Data is multiplexed to
and from the device by means of a three-state BCD I/O port.
The CARRY/BORROW, EQUAL, ZERO outputs, and the
BCD port will each drive one standard TTL load.
To permit operation in noisy environments and to prevent
multiple triggering with slowly changing inputs, the count
input is provided with a Schmitt trigger.
Input frequency is guaranteed to 2MHz, although the device will
typically run with fIN as high as 5MHz. Counting and comparing
(EQUAL output) will typically run 750kHz maximum.
Ordering Information
PART
NUMBER
TEMP. RANGE
(oC)
ICM7217AIPI
ICM7217CIPl
-25 to 85
-25 to 85
ICM7217IJI
lCM7217BlJl
-25 to 85
-25 to 85
PACKAGE
28 Ld PDIP
28 Ld PDIP
28 Ld CERDIP
28 Ld CERDIP
DISPLAY DRIVER
TYPE
Common Cathode
Common Cathode
Common Anode
Common Anode
COUNT OPTION/
MAX COUNT
Decade/9999
Timing/5959
Decade/9999
Timing/5959
PKG. NO.
E28.6
E28.6
F28.6
F28.6
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
9-12
File Number 3167.1
1 page  
Timing Waveforms
UP/DOWN
COUNT INPUT
CARRY/BORROW
EQUAL
ZERO
ICM7217
tUCS
tUCH
tCWH
tCB
tCEL
tCZL
tBW
FIGURE 2. COUNT AND OUTPUTS TIMING
tCWL
tCEH
tCZH
LOAD COUNTER
(OR LOAD REGISTER)
SCAN
D4
D3
D2
D1
INTERNAL
OPERATING
MODE
INPUT
OUTPUT
BCD I/O
DN OUT
D4 D3
IN IN
D2
IN
= HIGH IMPEDANCE
= THREE-STATE W/PULLDOWN
FIGURE 3. BCD I/O AND LOADING TIMING
COUNT INHIBITED IF
LOAD COUNTER
D1
IN
D4 OUT
D3 OUT
9-16
5 Page 
ICM7217
When using the circuit as a programmable divider (÷ by n
with equal outputs) a short time delay (about 1µs) is needed
from the EQUAL output to the RESET input to establish a
pulse of adequate duration. (See Figure 16).
When the circuit is configured to reload the counter or regis-
ter with a new value from the BCD lines (upon reaching
EQUAL), loading time will be digit “on” time multiplied by
four. If this load time is longer than one period of the input
count, a count can be lost. Since the circuit will retain data in
the register, the register need only be updated when a new
value is to be entered. RESET will not clear the register.
N.O.
0.047µF
10Ω
VDD
10kΩ
RESET INPUT
ICM7217
5kΩ
VSS
FIGURE 15. POWER ON RESET
EQUAL
VDD
47pF
33K
RESET
FIGURE 16. EQUAL TO RESET DELAY
Test Circuit
COMMON ANODE DISPLAY
a
fb
g
ec
d
D4
a
fb
g
ec
d
D3
a
fb
g
ec
d
D2
a
fb
g
ec
d
D1
c
a
d
f
e
b
g
THUMBWHEEL SWITCHES
BCD I/O 8s
BCD I/O 4s
BCD I/O 2s
BCD I/O 1s
COUNT INPUT
D4 D3 D2 D1
9999
VDD
+5V
CARRY
1
ZERO
2
EQUAL
3
4
5
6
7
STORE
UP/DOWN
LOAD REGISTER
LOAD COUNTER
SCAN
RESET
8
9
10
11
12
13
14
N.O.
ICM7217
ICM7217B
VDD
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VSS
DISPLAY
CONTROL
9-22
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet ICM7217.PDF ] | |
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