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PDF UCQ5810AF Data sheet ( Hoja de datos )

Número de pieza UCQ5810AF
Descripción BiMOS II 10-BIT SERIAL-INPUT / LATCHED SOURCE DRIVERS WITH ACTIVE-DMOS PULL-DOWNS
Fabricantes Allegro 
Logotipo Allegro Logotipo



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5810 -F
BiMOS II 10-BIT SERIAL-INPUT, LATCHED
SOURCE DRIVERS WITH ACTIVE-DMOS PULL-DOWNS
UCN5810AF
OUT8 1
OUT7 2
OUT6 3
CLOCK 4 CLK
GROUND 5
LOGIC
SUPPLY
6 VDD
STROBE 7 ST
OUT 5 8
OUT4 9
18 OUT 9
LATCHES
REGISTER
REGISTER
LATCHES
17 OUT 10
16
SERIAL
DATA OUT
VBB 15
LOAD
SUPPLY
14 SERIAL
DATA IN
BLNK 13 BLANKING
12 OUT1
11 OUT 2
10 OUT 3
Dwg. PP-029
ABSOLUTE MAXIMUM RATINGS
at TA = 25°C
Logic Supply Voltage, VDD ..................... 15 V
Driver Supply Voltage, VBB .................... 60 V
Continuous Output Current Range,
IOUT .......................... -40 mA to +15 mA
Input Voltage Range,
VIN ........................ -0.3 V to VDD + 0.3 V
Package Power Dissipation, PD
(UCN5810AF) ........................... 2.27 W*
(UCN5810EPF) ........................ 1.78 W*
(UCN5810LWF) ........................ 1.56 W*
Operating Temperature Range,
TA .................................. -20°C to +85°C
Storage Temperature Range,
TS ................................ -55°C to +150°C
*Derate linearly to 0 W at +150°C.
Caution: CMOS devices have input static
protection but are susceptible to damage when
exposed to extremely high static electrical
charges.
Note that the UCN5810AF (dual in-line package)
and UCN5810LWF (small-outline IC package) are
electrically identical and share a common pin
number assignment.
The UCN5810AF, UCN5810EPF, and UCN5810LWF combine a 10-bit
CMOS shift register and accompanying data latches, control circuitry, bipolar
sourcing outputs with DMOS active pull-downs. Designed primarily to drive
vacuum-fluorescent displays, the 60 V and -40 mA output ratings also allow
these devices to be used in many other peripheral power driver applications.
The UCN5810AF/EPF/LWF feature reduced supply requirements (active
DMOS pull-downs) and lower saturation voltages when compared with the
original UCN5810A.
The CMOS shift register and latches allow direct interfacing with
microprocessor-based systems. With a 5 V supply, they will operate to at
least 3.3 MHz. At 12 V, higher speeds are possible. Use with TTL may
require appropriate pull-up resistors to ensure an input logic high.
A CMOS serial data output enables cascade connections in applications
requiring additional drive lines. Similar devices are available as the
UCN5811A (12 bits), UCN5812AF/EPF (20 bits), and UCN5818AF/EPF (32
bits).
The UCN5810AF/EPF/LWF output source drivers are NPN Darlingtons
capable of sourcing up to 40 mA. The DMOS active pull-downs are capable
of sinking up to 15 mA. For inter-digit blanking, all of the output drivers can
be disabled and the DMOS sink drivers turned on by the BLANKING input
high.
The UCN5810AF is furnished in an 18-pin dual in-line plastic package.
The UCN5810EPF is furnished in a 20-lead plastic chip carrier. The
UCN5810LWF is furnished in a wide-body, small-outline plastic package
(SOIC) with gull-wing leads. Copper lead frames, reduced supply current
requirements, and lower output saturation voltages allow all devices to source
25 mA from all outputs continuously, over the entire operating temperature
range. All devices are also available for operation between -40°C and +85°C.
To order, change the prefix from ‘UCN’ to ‘UCQ’.
FEATURES
I High-Speed Source Drivers
I 60 V Minimum
Output Breakdown
I Improved Replacements
for TL4810B
I Low Output Saturation Voltages
I Low-Power CMOS Logic
and Latches
I To 3.3 MHz Data Input Rate
I Active DMOS Pull-Downs
Always order by complete part number, e.g., UCN5810AF .

1 page




UCQ5810AF pdf
18
0.280
0.240
5810-F
10-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVERS
WITH ACTIVE-DMOS PULL-DOWNS
UCN5810AF
Dimensions in Inches
(controlling dimensions)
10
0.014
0.008
0.430
MAX
0.300
BSC
1
0.070
0.045
0.210
MAX
0.015
MIN
0.022
0.014
18
7.11
6.10
0.920
0.880
0.100
BSC
9
0.005
MIN
0.150
0.115
Dimensions in Millimeters
(for reference only)
10
Dwg. MA-001-18A in
0.355
0.204
10.92
MAX
7.62
BSC
5.33
MAX
1
1.77
1.15
23.37
22.35
2.54
BSC
9
0.13
MIN
0.39
MIN
3.81
2.93
0.558
0.356
NOTES: 1. Exact body and lead configuration at vendor’s option within limits shown.
2. Lead spacing tolerance is non-cumulative.
3. Lead thickness is measured at seating plane or below.
4. Supplied in standard sticks/tubes of 21 devices.
Dwg. MA-001-18A mm
www.allegromicro.com

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