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PDF UAA3220TS Data sheet ( Hoja de datos )
| Número de pieza | UAA3220TS | |
| Descripción | Frequency Shift Keying FSK/Amplitude Shift Keying ASK receiver | |
| Fabricantes | Philips | |
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INTEGRATED CIRCUITS
DATA SHEET
UAA3220TS
Frequency Shift Keying
(FSK)/Amplitude Shift Keying
(ASK) receiver
Product specification
Supersedes data of 1998 April 10
File under Integrated Circuits, IC01
1999 Jan 22
1 page  
Philips Semiconductors
Frequency Shift Keying (FSK)/Amplitude
Shift Keying (ASK) receiver
Product specification
UAA3220TS
FUNCTIONAL DESCRIPTION
Mixer
The mixer is a single-balanced emitter-coupled mixer with
internal biasing. Matching of the RF source impedance to
the mixer input requires an external matching network.
Oscillator
The oscillator is based on a transistor connected in
common collector configuration followed by a cascode
stage driving a tuned circuit. The voltage at this tuned
circuit drives the frequency multiplier. The bias current of
the oscillator is set by an off-chip resistor (R40 in the
application diagram of Fig.9) to a typical value of 260 µA at
433.92 MHz (R40 = 1.8 kΩ). The oscillator frequency is
controlled by an off-chip overtone crystal (X40). Off-chip
capacitors between base and emitter (C42) and ground
(C41) make the oscillator transistor appear as having
negative resistance at small signal levels. This causes the
oscillator to start. A parallel resonance circuit (L40 and
C41) connected to the emitter of the oscillator transistor
prevents oscillation at the fundamental frequency of the
crystal. The LC tank circuit at the output of the oscillator is
used to select either the fundamental, the second or the
third harmonic of the oscillator frequency.
Frequency multiplier
The frequency multiplier is an emitter-coupled transistor
pair driving an off-chip balanced tuned circuit. The bias
current of this emitter coupled pair is set by an off-chip
resistor (R50) to a typical value of 350 µA at 433.92 MHz
(R50 = 1.2 kΩ). The oscillator output signal is AC-coupled
to one of the inputs of the emitter-coupled pair. The other
input is connected to ground via an on-chip capacitor.
The output voltage of the frequency multiplier drives the
switching stage of the mixer. The bias voltage at this point
is set by an off-chip resistor (R51) to allow sufficient
voltage swing at the mixer outputs.
Post mixer amplifier
The Post Mixer Amplifier (PMA) is a differential input,
single-ended output amplifier. Amplifier gain is provided in
order to reduce the influence of the limiter noise figure on
the total noise figure.
Limiter
The limiter is a single-ended input multiple stage amplifier
with high total gain. Amplifier stability is achieved by
means of an external DC feedback capacitor (C21), which
is also used to determine the lower limiter cut-off
frequency. An RSSI signal proportional to the limiter input
signal is provided. Figure 3 shows the DC voltage at pin 18
(RSSI) as a function of the input voltage (RMS value) at
pin 20 (LIN). It also gives the typical IF of 10.7 MHz.
The lower knee of the level curve (see Fig.3) is determined
by the effective noise bandwidth and is, consequently,
slightly higher.
IF filter
IF filtering with high selectivity is realized by means of an
external ceramic filter (X20), which feeds the IF from the
PMA to the limiter.
FM demodulator
Coming from the limiter the FSK signal is fed differential to
the input of the FM demodulator. After buffering the signal
is fed to a phase detector. The phase shift is generated by
an external LC combination connected to DEMO1 (pin 10)
and DEMO2 (pin 11). The baseband signal is coupled out
single ended via an output buffer and is fed to the FSK
input of the ASK/FSK switch.
ASK/FSK switch
The selection of either ASK or FSK reception will be done
by the DEMO1 (pin 10). Grounding this pin to 0 V will
switch the IC to ASK mode. Additional the FM demodulator
and parts of the data slicer will be switched off. In FSK
mode DEMO1 (pin 10) is connected to DEMO2 (pin 11)
via a LC combination (see Fig.9).
Data filters
After demodulation a two-stage data filtering circuit is
provided in order to suppress unwanted frequency
components. Two RC low-pass filters with on-chip
resistors are provided which are separated by a buffer
stage.
1999 Jan 22
5
5 Page 
Philips Semiconductors
Frequency Shift Keying (FSK)/Amplitude
Shift Keying (ASK) receiver
Product specification
UAA3220TS
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Limiter
Ri(LIN)
Buffer
RCPC
Gbuffer
RCPA,CPB
limiter input resistance
data buffer output resistance at pin 17
data buffer AC gain
data buffer output resistance at
pins 15 and 16
40 48 56 kΩ
24 30 36 kΩ
12 13 14 dB
120 150 180 kΩ
Data slicer; see Chapter “DC characteristics”
Bds internal data slicer bandwidth
50 −
100 kHz
Notes
1. 100% AM modulation (ASK); available power from generator into a 50 Ω load.
2. With external matching network, to transform the impedance to 50 Ω.
3. ∆f = 10 kHz; available power from generator into a 50 Ω load.
4. Measured at the RF input connector of the test board into a 50 Ω load; fi(RF) = 25 MHz to 1 GHz.
5. The data frequency range can be varied by changing C30 to C32 (see Figs 9 and 10) to match other bit rates.
Data frequency determined by data slicer application.
6. ton = 50 ms; toff = 138 ms; P = Psens + 3 dB.
7. The given turn-on time is only valid during strobing by pin PWD; if the IC is strobed on and off by the supply voltage
the turn-on time will be longer.
8. LC tank circuit (L60, C60) tuned to maximum phase slope.
9. GPMA is typically 6 dB lower when measured in the application, because of the load of the ceramic filter.
1999 Jan 22
11
11 Page | ||
| Páginas | Total 32 Páginas | |
| PDF Descargar | [ Datasheet UAA3220TS.PDF ] | |
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