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PDF VT6102 Data sheet ( Hoja de datos )
| Número de pieza | VT6102 | |
| Descripción | PCI Fast Ethernet Controller with ACPI Function | |
| Fabricantes | Via Technologies | |
| Logotipo |  |
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VIA Technologies, Inc.
Preliminary VT6102
VT6102
PCI FAST ETHERNET CONTROLLER
WITH ACPI FUNCTION
DATA SHEET
(Preliminary)
DATE : August 1, 1999
VIA TECHNOLOGIES, INC.
www.dVear_t0a1 sheet4u.com
1
1 page  
VIA Technologies, Inc.
Preliminary VT6102
1. Overview
1-1. VT6102 PCI FAST ETHERNET MAC CONTROLLER FEATURES
• Single chip Fast Ethernet MAC controller for PCI bus interface
-- Compliant to PCI 2.2 specification.
-- Provides a direct connection to PCI bus
-- Supports two network ports : 10/100MB MII interface
• High performance PCI mastering structure
-- VIA self-define 256 bytes memory I/O or register I/O based command and status register
-- Software oriented chain structure description to minimize hardware complexity
-- Include on chip bus master DMA with programmable burst length for high PCI bus utilization
-- Support Transmit data buffer byte-alignment for low CPU utilization
-- Dynamic transmit packet auto queuing for back to back transmissin
-- Programmable activity polling intervals for description DMA
-- Programmable DMA arbitration priority to minimize overflow under flow condition
-- Support early receive and early transmit interrupt for software parallel processing
-- Interrupt controllable by receive/transmit descriptor list for saving interrupt service time
-- PCI enhance command capable
• Provides standard 100-M bits MII interface
-- Support 100Base- T4 with CAT3, CAT4, CAT 5 UTP, STP
-- Support 100Base-TX with CAT5 UTP, STP and fiber cables
-- 10/100Mhz full duplex, half duplex operation
• Separate 2K bytes FIFO for Receive and Transmit controllers
-- both supports bursts of up to full Ethernet length
-- Programmable receive and transmit FIFO threshold control for optimize PCI throughput
• Flexible dynamically load EEPROM algorithm.
-- Load after power-up
-- Dynamic auto reload
-- Embedded programming for configure modification
-- Dynamic direct programming for manufacturing.
• Support external Bootrom up to 64K bytes no external address latch
-- Support Flash ROM read/write
-- Support EPROM Read.
• Support ACPI Functions
-- Supports PC97, PC98, PC99 and Net PC requirements
-- Supports PCI Bus Power Management Interface Specification Version 1.0/1.1
-- Supports Advanced Configuration and Power Interface (ACPI) Specification 1.0
-- Supports Network Device Class Power Management Specification Version 1.0
-- Wake-up even support link change/magic packet/ unicast physical address/MS define pattern match
• Support flow control functions
-- Support IEEE802.3X for full duplex.
-- Support force Jam capable for half duplex.
-- multiple pause frame SON/SOFF.
• Single 3.3V supply, 5.0V tolerant IO 0.35um triple metal CMOS technology
• 128 pin PQFP package
Ver_01
5
5 Page 
VIA Technologies, Inc.
Preliminary VT6102
2-3-4. Power Management interface
No.
Name
Type
Description
110
WOL
O Wake on Lan Event,,programmable pulse or button WOL event, active
high.
111
PME#
O/D Power management event.interrupt outpur
108
AUXRST#
I PHY reset aux input. This pins might connect to PCI reset for non-wake
on LAN design. This pins is normally no connect or pull up with 22
ohm resistor.
109
PHYRST
O PHY RESET Pin, PHY reset output to external PHY device. This
output polarity control by VTEST, When VTEST=0,PHY reset high
active, When VTEST=1,PHY reset low active.
107
VTEST
I Test control Pin,it can control PHY reset output polarity
2-3-5. Power and Ground
No.
8,20,32,
45,56,65,
74,83,1
16,123
86,95,104
4,13,22,
31,39,46,
57,66,7
5,115,
124
87,96,103
72
73
Name
VDD
SVDD
VSS
SVSS
RAMVDD
RAMVSS
Type
P VCC Power: +3.3V
Description
P Standby VCC Power: +3.3V
G Ground: 0V
G Ground: 0V
P Memory Interface Power
G Memory Interface Ground
Ver_01
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet VT6102.PDF ] | |
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