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PDF DG527 Data sheet ( Hoja de datos )

Número de pieza DG527
Descripción Analog CMOS Latchable Multiplexers
Fabricantes Intersil Corporation　
Logotipo Intersil Corporation Logotipo



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No Preview Available ! DG527 Hoja de datos, Descripción, Manual

April 1999
Semiconductor
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DG526, DG527,
DG528, DG529
Analog CMOS
Latchable Multiplexers
Features
Description
• Direct RESET
• TTL and CMOS Compatible Address and Enable
Inputs
• Maximum Power Supply Rating . . . . . . . . . . . . . . . . 44V
• Break-Before-Make Switching
• Alternate Source
Applications
• Data Acquisition Systems
• Communication Systems
• Automatic Test Equipment
• Microprocessor Controlled Systemd
The DG526, DG527, DG528, and DG529 are CMOS
Monolithic 16-Channel/Dual 4-Channel Analog Multiplexers.
Each device has on-chip address and control latches to sim-
plify design in microprocessor based applications. The DG526
uses 4 address lines to control its 16 channels; the DG527,
DG528 both use 3 address lines to control their 8 channels;
and the DG529 uses 2 address lines to control its 4 channels.
The enable pin is used to enable the address latches during
the WR pulse. It can be hard wired to the logic supply if one of
the channels will always be used (except during a reset) or it
can be tied to address decoding circuitry for memory mapped
operation. The RS pin is used to clear all latches regardless of
the state of any other latch or control line. The WR pin is used
to transfer the state of the address control lines to their
latches, except during a reset or when EN is low.
A channel in the ON state conducts signals equally well in
both directions. In the OFF state each channel blocks volt-
ages up to the supply rails. The address inputs, WR, RS and
the enable input are TTL and CMOS compatible over the full
specified operation temperature range.
Part Number Information
PART
NUMBER
DG526AK
DG526AK/883B
DG526BK
DG526BY
DG526CJ
DG526CK
DG526CY
DG527AK
DG527AK/883B
DG527BK
DG527BY
DG527CJ
DG527CK
DG527CY
TEMP.
RANGE (oC)
PACKAGE
-55 to 125 28 Ld CERDIP
-55 to 125 28 Ld CERDIP
-25 to 85 28 Ld CERDIP
-25 to 85 28 Ld SOIC
0 to 70 28 Ld PDIP
0 to 70 28 Ld CERDIP
0 to 70 28 Ld SOIC
-55 to 125 28 Ld CERDIP
-55 to 125 28 Ld CERDIP
-25 to 85 28 Ld CERDIP
-25 to 85 28 Ld SOIC
0 to 70 28 Ld PDIP
0 to 70 28 Ld CERDIP
0 to 70 28 Ld SOIC
PKG. NO.
F28.6
F28.6
F28.6
M28.3
E28.6
F28.6
M28.3
F28.6
F28.6
F28.6
M28.3
E28.6
F28.6
M28.3
PART
NUMBER
DG528AK
DG528AK/883B
DG528BK
DG528BY
DG528CJ
DG528CK
DG528CY
DG529AK
DG529AK/883B
DG529BK
DG529BY
DG529CJ
DG529CK
DG529CY
TEMP.
RANGE (oC)
PACKAGE
-55 to 125 18 Ld CERDIP
-55 to 125 18 Ld CERDIP
-25 to 85 18 Ld CERDIP
-25 to 85 18 Ld SOIC
0 to 70 18 Ld PDIP
0 to 70 18 Ld CERDIP
0 to 70 18 Ld SOIC
-55 to 125 18 Ld CERDIP
-55 to 125 18 Ld CERDIP
-25 to 85 18 Ld CERDIP
-25 to 85 18 Ld SOIC
0 to 70 18 Ld PDIP
0 to 70 18 Ld CERDIP
0 to 70 18 Ld SOIC
PKG. NO.
F18.3
F18.3
F18.3
M18.3
E18.3
F18.3
M18.3
F18.3
F18.3
F18.3
M18.3
E18.3
F18.3
M18.3
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1999
12-1
File Number 3139.2

1 page




DG527 pdf
DG526, DG527, DG528, DG529
Absolute Maximum Ratings
V+ to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +44V
V- to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-25V
VIN to Ground (Note 1) . . . . . . . . . . . . . . . . . . . . (V- - 2V), (V+ + 2V)
VS or VD to V+ (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . +2V, (V- - 2V)
VS or VD to V- (Note 1). . . . . . . . . . . . . . . . . . . . . . . . -2V, (V+ + 2V)
Current, Any Terminal Except S or D . . . . . . . . . . . . . . . . . . . . 30mA
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40mA
(Pulsed at 1ms, 10% Duty Cycle Max)
Operating Conditions
Operating Temperature
C Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC
B Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC
A Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W) θJC (oC/W)
18 Ld PDIP Package . . . . . . . . . . . . . .
90
N/A
18 Ld CERDIP Package . . . . . . . . . . .
75
22
18 Ld SOIC Package . . . . . . . . . . . . . .
95
N/A
28 Ld PDIP Package . . . . . . . . . . . . . .
60
N/A
28 Ld CERDIP Package . . . . . . . . . . .
55
18
28 Ld SOIC Package . . . . . . . . . . . . . .
70
N/A
Maximum Junction Temperature
Ceramic Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC
Plastic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range
C Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65oC to 125oC
A and B Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications (Note 3) V+ = +15V, V- = -15V, GND = 0V, WR = 0V, RS = 2.4V, EN = 2.4V, TA = 25oC,
Unless Otherwise Specified
PARAMETER
(NOTE 6)
TEST CONDITIONS
DYNAMIC
Switching Time
of Multiplexer,
tTRANSITION
DG526,
DG527
DG528,
DG529
See Figure 3 (Note 7)
See Figure 3
Break-Before-
Make Interval,
tOPEN
DG526,
DG527
DG528,
DG529
See Figure 4
Enable and
Write Turn-ON
Time,
tON (EN, WR)
DG526,
DG527
DG528,
DG529
See Figures 1, 6 (Note 7)
See Figures 5, 6 (Note 7)
Enable and
Reset Turn
OFF Time,
tOFF (EN, RS)
DG526,
DG527
DG528,
DG529
See Figures 2, 7 (Note 7)
See Figures 5, 6 (Note 7)
Off Isolation,
OIRR
DG526, VEN = 0V, R = 1kΩ, CL = 15pF,
DG527 VS = 7VRMS, f = 500kHz (Note 4)
DG528,
DG529
A SUFFIX
(NOTE 2)
MIN TYP MAX
B AND C SUFFIX
(NOTE 2)
MIN TYP MAX
UNITS
- 0.65 1 - 0.65 - µs
- 0.6 1 - 0.6 - µs
- 0.2 - - 0.2 - µs
- 0.2 - - 0.2 - µs
- 0.7 1.5 - 0.7 - µs
- 1 1.5 - 1 - µs
- 0.4 1 - 0.4 - µs
- 0.4 1 - 0.4 - µs
- 55 - - 55 - dB
- 68 - - 68 - dB
Logic Input
Capacitance,
CIN
DG526, f = 1MHz
DG527
DG528,
DG529
- 6 - - 6 - pF
- 2.5 - - 2.5 - pF
Source OFF
Capacitance,
CS(OFF)
DG526, VS = 0V
DG527
DG528,
DG529
VEN = 0V,
f = 140kHz
- 10 - - 10 - pF
- 5 - - 5 - pF
12-5

5 Page





DG527 arduino
DG526, DG527, DG528, DG529
Test Circuits and Waveforms (Continued)
3V
EN
0
+15V
V+
A0, A1, (A2)
DG528
DG529†
Sx
RS
D
+2.4V
VO
VO ∆VO
∆VO is the measured voltage error due to charge injection.
The error voltage in Coulombs is Q = CL x ∆VO.
FIGURE 8A. CHARGE INJECTION WAVEFORMS
Typical Performance Curves
GND WR V-
CL = 1000pF
EN
-15V
FIGURE 8B. CHARGE INJECTION TEST CIRCUIT
† Similar connections for DG526, DG527
550
500 IO = -200µA
VEN = +5V
450
400
(D)
(C)
350 (B)
300 (A)
250
200
150 (A) V+ = +15V, V- = -15V
100 (B) V+ = +12V, V- = -12V
(C) V+ = +10V, V- = -10V
50 (D) V+ = +7.5V, V- = -7.5V
0
-15 -13 -11 -9 -7 -5 -3 -1 0 +1 +3 +5 +7 +9 +11 +13 +15
ANALOG SIGNAL VOLTAGE (V)
FIGURE 9. rDS(ON) vs ANALOG SIGNAL VOLTAGE vs SUPPLY
VOLTAGE
400
360
V+ = +15V V- = -15V
VEN = 2.4V
320 IO = -200µA
+10V SIGNALS
280
+10V SIGNALS
240
200
160
120
80
40
0
-55 -25
0 25 45 70
TEMPERATURE (oC)
100
125
FIGURE 10. TYPICAL rDS(ON) VARIATION WITH TEMPERATURE
12-11

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