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Número de pieza | DG202 | |
Descripción | Quad SPST / CMOS Analog Switches | |
Fabricantes | Intersil Corporation | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de DG202 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
No Preview Available ! Data Sheet
DG201A, DG202
June 1999 File Number 3117.2
Quad SPST, CMOS Analog Switches
The DG201A and DG202 quad SPST analog switches are
designed using Intersil’s 44V CMOS process. These
bidirectional switches are latch-proof and feature break-
before-make switching. Designed to block signals up to
30VP-P in the OFF state, the DG201A and DG202 offer the
advantages of low ON resistance (≤175Ω), wide input signal
range (±15V) and provide both TTL and CMOS compatibility.
The DG201A and DG202 are specification and pinout
compatible with the industry standard devices.
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
DG201AAK
-55 to 125 16 Ld CERDIP
DG201ABK
-25 to 85 16 Ld CERDIP
DG201ACJ
0 to 70 16 Ld PDIP
DG201ACY
0 to 70 16 Ld SOIC
DG202AK
-55 to 125 16 Ld CERDIP
DG202CJ
0 to 70 16 Ld PDIP
PKG.
NO.
F16.3
F16.3
E16.3
M16.3
F16.3
E16.3
Pinout
DG201A, DG202
(CERDIP, PDIP, SOIC)
TOP VIEW
IN1 1
D1 2
S1 3
V- 4
GND 5
S4 6
D4 7
IN4 8
16 IN2
15 D2
14 S2
13
V+ (SUB-
S- TRATE)
12 NC
11 S3
10 D3
9 IN3
Features
• Input Signal Range. . . . . . . . . . . . . . . . . . . . . . . . . . ±15V
• Low rDS(ON) (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . 175Ω
• TTL, CMOS Compatible
• Latch-Up Proof
• True Second Source
• Maximum Supply Ratings. . . . . . . . . . . . . . . . . . . . . . 44V
• Logic Inputs Accept Negative Voltages
Functional Block Diagrams
DG201A
S1
IN1
D1
S2
IN2
D2
S3
IN3
D3
S4
IN4
D4
DG202
IN1
IN2
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
SWITCHES SHOWN FOR LOGIC “1” INPUT
TRUTH TABLE
LOGIC
DG201A
DG202
0 ON
1 OFF
Logic “0” ≤0.8V, Logic “1” ≥ 2.4V
OFF
ON
4-1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1 page DG201A, DG202
Dual-In-Line Plastic Packages (PDIP)
INDEX
AREA
N
12 3
E1
N/2
-A-
BASE
PLANE
SEATING
PLANE
D1
B1
B
-B-
D
-C- A2 A
L
D1
e
A1
eC
0.010 (0.25) M C A B S
E
CL
eA
C
eB
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated in JE-
DEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
6. E and eA are measured with the leads constrained to be perpendic-
ular to datum -C- .
7. eB and eC are measured at the lead tips with the leads unconstrained.
eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
E16.3 (JEDEC MS-001-BB ISSUE D)
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
-
0.210
-
5.33
4
A1
0.015
-
0.39
-
4
A2
0.115 0.195 2.93
4.95
-
B
0.014 0.022 0.356 0.558
-
B1 0.045 0.070 1.15 1.77 8, 10
C
0.008 0.014 0.204 0.355
-
D
0.735 0.775 18.66 19.68
5
D1
0.005
-
0.13
-
5
E
0.300 0.325 7.62
8.25
6
E1
0.240 0.280 6.10
7.11
5
e 0.100 BSC 2.54 BSC -
eA 0.300 BSC
7.62 BSC
6
eB - 0.430 - 10.92 7
L
0.115 0.150 2.93
3.81
4
N 16
16 9
Rev. 0 12/93
4-5
5 Page |
Páginas | Total 7 Páginas | |
PDF Descargar | [ Datasheet DG202.PDF ] |
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