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PDF MSC1164 Data sheet ( Hoja de datos )

Número de pieza MSC1164
Descripción 20-Bit Grid/Anode Driver
Fabricantes OKI electronic 
Logotipo OKI electronic Logotipo



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No Preview Available ! MSC1164 Hoja de datos, Descripción, Manual

E2C0011-27-Y4
¡¡SemicondSucetormiconductor
MSC1164
20-Bit Grid/Anode Driver
This version: NMovS. C19191764
Previous version: Jul. 1996
GENERAL DESCRIPTION
The MSC1164 is a monolithic IC using the Bi-CMOS process technology for hybridizing CMOS
and bipolar transistors on the same chip. The logic portion such as the input stage, shift register
and latch is fabricated by CMOS and the output driver requiring a high withstand voltage is
fabricated by bipolar transistors.
Since a 32-pin plastic SSOP package is used, the display unit size can be reduced.
FEATURES
The MSC1164 is designed as a VFD grid/anode driver with emitter-follower force output with
20-bit active pull-down and built-in 20-bit shift register and latch.
• Logic Supply Voltage (VCC)
• Driver Supply Voltage (VHV)
• Driver Output Current
: 5V
: 65V
IOHVH1 :–40mA (Only one driver output: "H")
IOHVH2 :–2mA (All driver outputs: "H")
IOHVL :2mA
• 20-bit output (with latch circuit)
• 20-bit shift register
• Clock frequency
: 4MHz
• Package options:
32-pin plastic SSOP (SSOP32-P-430-1.00-K) (Product name: MSC1164GS-K)
30-pin plastic shrink DIP (SDIP30-P-400-1.78) (Product name: MSC1164SS)
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MSC1164 pdf
¡ Semiconductor
MSC1164
PIN DESCRIPTION
Function
Driver Output
Driver Power Supply
Driver GND
Logic GND
Clear Input
Latch Strobe Input
Data Input
Logic Power Supply
Data Output
Clock Input
Test Input
Pin
26 - 7
27
28
5
4
30
6
3
29
31
Symbol
Description
HVO1 -
HVO20
Driver output pin, applicable to each bit of shift register.
VHV Power supply pin for driver circuit.
GND
GND pin for the driver circuit.
GND pin for the logic circuit.
Clear input pin with pull-up resistor. Normally "H" level. In this
CL
condition, the driver outputs "H" or "L" according to the
corresponding latch output level. Setting this pin to "L" enables
the driver output to be fixed at "L" irrespective of latch output.
Latch strobe input pin with neither pull-up nor pull-down resistor.
When LS is "H", the output of the shift register becomes that of the
LS latch circuit.
When LS is "L", the latch circuit holds the contents of the shift
register that are immediately before LS goes "L".
DIN
Shift register input pin with neither pull-up nor pull-down resistor.
Display data is input in synchronization with clock. (Positive Logic)
VCC
DOUT
Power supply pin for logic (except driver).
VCC should be 4.5V to 5.5V.
Serial output pin for shift register.
CLK
Clock input pin. Data of shift register is shifted from one stage to
the next at the rising edge of clock.
Test input pin with a pull-down resistor. Normally "L". If CL = "H"
CHG in this condition, the driver outputs "H" or "L" according to the
corresponding latch output.
Note: Pin numbers shown are for 32-pin plastic SSOP.
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5 Page





MSC1164 arduino
¡ Semiconductor
FUNCTIONAL DESCRIPTION
Function Table
MSC1164
CLK DIN
H
L
R-1 R-2 R-3 R-4
H R1n R2n R3n
L R1n R2n R3n
•••••••••••••••
R-20
R19n
R19n
DOUT
R19n
R19n
CL CHG LS R.X HVO.X
L XX XL
H HX XH
H L H HH
H LHLL
H L L X NC
L: Low Level, H: High Level, X: Don't Care, NC: Change
NOTES ON USE
1. The MSC1164 is designed as a grid/anode driver of VFD.
The data applied to the data input pin is read into the shift register at the rising edge of the
clock and shifted sequencially to the shift register synchronizing with the clock.
The shift register output drives the output driver, passing through the latch and the NOR
circuit.
Setting the CL pin to "L" makes all driver outputs go into "L". This function can be used for
setting display blanking.
2. The contents of the shift register are undefined after power is turned on.
Therefore, two or more driver outputs may go into "H" at the same time after power-on. (If
it happens, an overloading beyond the power dissipation limit may occur to cause a device
break-down.)
To avoid this, take the following procedure:
1) Turn on the power of the logic portion while holding the CL pin to "L".
2) Turn on the power of the driver portion.
3) Apply a "L" level signal to the DIN pin and send clock pulses by the specified number
of grids to reset ("L") the entire contents of the shift register.
4) Initialize the driver outputs to "L".
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