PDF TA1360ANG Data sheet ( Hoja de datos )

Número de pieza	TA1360ANG
Descripción	Bipolar Linear Integrated Circuit Silicon Monolithic
Fabricantes	Toshiba
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No Preview Available ! TA1360ANG TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic TA1360ANG YCbCr/YPbPr Signal and Sync Processor for Digital TV, Progressive Scan TV and Double Scan TV The TA1360ANG integrates an analog component signal (YCbCr/YPbPr) processor and sync processor in a 56-pin shrink DIP plastic package. The IC is ideal for digital TVs, progressive TVs, and double scan TVs. The luminance block and the color difference block incorporate the high performance signal processing circuits. The sync processor block supports 525I/60, 625I/50, 525P/60, 625P/50, 1125I/50, 1125I/60, 750P/60, (750P/50), PAL100 Hz, NTSC120 Hz, and SVGA/60(VESA). The TA1360ANG incorporates the I2C bus. The device can control various functions via the bus line. Weight: 5.55 g (typ.) Features Luminance Block • Black stretch circuit and DC restoration rate correction circuit • Dynamic γ correction circuit (gray scale correction) • SRT (LTI) • Y group delay correction (shoot balance correction) • High-bright color circuit • Color detail enhancer (CDE) • White pulse limiter (WPL) • VSM output Color difference Block • Fresh color correction • Dynamic Y/C correction circuit • Color SRT (CTI) • Color γ circuit • Green stretch • Blue stretch Text Block • OSD blending SW • ACB (only black level) • Two analog RGB inputs Synchronization Block • Horizontal sync (15.75 k, 28.125 k, 31.5 k, 33.75 k, 37.9 k, 45 kHz) • Vertical sync (525I/P, 625I/P, 750P, 1125I/P, PAL 100 Hz/NTSC 120 Hz • 2- and 3-level sync separator circuit • HD/VD input (positive and negative polarities) • Copy guard • Vertical blanking 1 2003-01-21 1 page Pin No. Pin Name Function Interface Circuit 8 Y2 IN Inputs Y2 signal via clamp capacitor. 8 9 10 9 Cb2/Pb2 IN 10 Cr2/Pr2 IN Inputs Cb2/Pb2 signal via clamp capacitor. Inputs Cr2/Pr2 signal via clamp capacitor. 1 kΩ 1 kΩ 5 kΩ 11 COLOR LIMITER Connects filter for detecting color limit. 11 5 kΩ 40 6 40 TA1360ANG Input Signal/Output Signal 1 Vp-p (including sync) at 100% color bar or 700 mVp-p at 100% color bar for Cb1/Pb1 700 mVp-p700 mVp-p at 100% color bar for Cr1/Pr1 DC 6 12 VSM FILTER Connects VSM output filter. Connect 0.01-µF capacitor between this pin and GND. 13 H-FREQ SW1 Switches horizontal frequency (Switch 1). Leave this pin open when horizontal frequency is switched by Bus controlling. Controlling this pin prevails over Bus control. (Refer to Table 1: Bus control function.) When this IC is used for CRT, connect this pin to DEF VCC (pin 19) or DEF GND (pin 25). If it is not necessary to control this pin on CRT, connect this pin directly to DEF VCC or DEF GND on the PCB. 14 SYNC IN Inputs Y signal with sync signal via clamp capacitor. 40 12 200 Ω 54 6 1 kΩ 13 19 25 1 kΩ 14 1 kΩ 19 DC DEF VCC or DEF GND White 100%: 1 Vp-p or 25 5 2003-01-21 5 Page TA1360ANG Bus Control Map Write Data Slave Address: 88H Sub-Add D7 D6 D5 D4 D3 D2 D1 D0 Preset 00 H-FREQ1 H-DUTY YUV-SW DAC1 DAC2 SYNC-SW H-FREQ2 1000 0000 01 HORIZONTAL POSITION CLP-PHS 1000 0000 02 ACB-MODE SCP-SW HBP-PHS1 SYNC SEP-LEVEL TEST 1000 0000 03 V-BLK PHASE VERTICAL FREQUENCY 1000 0000 04 COMPRESSION-BLK PHASE-1 COMPRESSION-BLK PHASE-2 1000 0000 05 P-MODE1 UNI-COLOR 1000 0000 06 BRIGHTNESS 1000 0000 07 OSD-ACL COLOR 1000 0000 08 TINT HBP-PHS2 1000 0000 09 PICTURE SHARPNESS BLS γ 1000 0000 0A RGB BRIGHTNESS DCRR-SW 1000 0000 0B HI BRT RGB CONTRAST 1000 0000 0C SUB CONTRAST WPS YUV MODE Y-OUT γ 1000 0000 0D DRIVE GAIN1 DR-R 1000 0000 0E DRIVE GAIN2 DR-B/G 1000 0000 0F R CUT OFF 1000 0000 10 G CUT OFF 1000 0000 11 B CUT OFF 1000 0000 12 R-Y/B-Y GAIN R-Y/B-Y PHASE 1000 0000 13 G-Y/B-Y GAIN G-Y/B-Y PHASE 1000 0000 14 COLOR SRT TRAN C FREQ GREEN STRETCH COLOR γ CLT 1000 0000 15 C.D.E. Y/C GAIN COMP BL STRETCH GAIN FLESH H-SHIFT 1000 0000 16 VSM PHASE VSM GAIN APACON PEAK FREQ 1000 0000 17 DC REST POINT DC REST RATE DC REST LIMIT 1000 0000 18 BLACK STRETCH POINT APL VS BSP B.L.C. B.D.L BS-AREA 1000 0000 19 SRT-GAIN WPL-LEVEL 1000 0000 1A D-ABL POINT D-ABL GAIN BL STRETCH POINT P-MODE2 1000 0000 1B ABL POINT ABL GAIN RGB OUT MODE 1000 0000 1C DYNC γ GAIN BS-CHAR1 STATIC γ GAIN-1 STATIC γ GAIN-2 1000 0000 1D OSD BRIGHT OSD CONTRAST Y/C-DL1 DYNC γ AREA 1000 0000 1E Y DETAIL CONTROL BS-CHAR2 WP BLUE POINT 1000 0000 1F Y GROUP DELAY CORRECTION Y/C-DL2 WP BLUE GAIN 1000 0000 Read Data Slave Address: 89H D7 D6 D5 D4 D3 D2 D1 D0 0 POR IK-IN RGB-OUT YUV-IN H-OUT VP-OUT RGB-IN SYNC-IN 11 2003-01-21 11 Page

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