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PDF 74HC161 Data sheet ( Hoja de datos )
| Número de pieza | 74HC161 | |
| Descripción | Presettable synchronous 4-bit binary counter asynchronous reset | |
| Fabricantes | Philips | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT161
Presettable synchronous 4-bit
binary counter; asynchronous reset
Product specification
File under Integrated Circuits, IC06
December 1990
1 page  
Philips Semiconductors
Presettable synchronous 4-bit binary
counter; asynchronous reset
Product specification
74HC/HCT161
Fig.5 State diagram.
Fig.6 Typical timing sequence: reset outputs to zero; preset to binary twelve; count to thirteen, fourteen, fifteen,
zero, one and two; inhibit.
December 1990
5
5 Page 
Philips Semiconductors
Presettable synchronous 4-bit binary
counter; asynchronous reset
AC WAVEFORMS
Product specification
74HC/HCT161
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.8 Waveforms showing the clock (CP) to outputs (Qn, TC) propagation delays, the clock pulse width, the
output transition times and the maximum clock frequency.
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.9 Waveforms showing the master reset (MR) pulse width, the master reset to output (Qn, TC) propagation
delays and the master reset to clock (CP) removal time.
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.10 Waveforms showing the input (CET) to output (TC) propagation delays and output transition times.
December 1990
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet 74HC161.PDF ] | |
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