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PDF 29C512 Data sheet ( Hoja de datos )
| Número de pieza | 29C512 | |
| Descripción | 512K 64K x 8 5-volt Only CMOS Flash Memory | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Fast Read Access Time – 70 ns
• 5-volt Only Reprogramming
• Sector Program Operation
– Single Cycle Reprogram (Erase and Program)
– 512 Sectors (128 Bytes/Sector)
– Internal Address and Data Latches for 128 Bytes
• Internal Program Control and Timer
• Hardware and Software Data Protection
• Fast Sector Program Cycle Time – 10 ms
• DATA Polling for End of Program Detection
• Low Power Dissipation
– 50 mA Active Current
– 100 µA CMOS Standby Current
• Typical Endurance > 10,000 Cycles
• Single 5V ± 10% Supply
• CMOS and TTL Compatible Inputs and Outputs
• Commercial and Industrial Temperature Ranges
• Green (Pb/Halide-free) Packaging Option
512K (64K x 8)
5-volt Only
Flash Memory
AT29C512
1. Description
The AT29C512 is a 5-volt only in-system Flash programmable and erasable read only
memory (PEROM). Its 512K of memory is organized as 65,536 words by 8 bits. Man-
ufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers
access times to 70 ns with power dissipation of just 275 mW over the commercial tem-
perature range. When the device is deselected, the CMOS standby current is less
than 100 µA. The device endurance is such that any sector can typically be written to
in excess of 10,000 times.
To allow for simple in-system reprogrammability, the AT29C512 does not require high
input voltages for programming. Five-volt-only commands determine the operation of
the device. Reading data out of the device is similar to reading from an EPROM.
Reprogramming the AT29C512 is performed on a sector basis; 128 bytes of data are
loaded into the device and then simultaneously programmed.
During a reprogram cycle, the address locations and 128 bytes of data are internally
latched, freeing the address and data bus for other operations. Following the initiation
of a program cycle, the device will automatically erase the sector and then program
the latched data using an internal control timer. The end of a program cycle can be
detected by DATA polling of I/O7. Once the end of a program cycle has been
detected, a new access for a read or program can begin.
0456H–FLASH–2/05
1 page  
AT29C512
4.7 DATA Polling
The AT29C512 features DATA polling to indicate the end of a program cycle. During a program
cycle an attempted read of the last byte loaded will result in the complement of the loaded data
on I/O7. Once the program cycle has been completed, true data is valid on all outputs and the
next cycle may begin. DATA polling may begin at any time during the program cycle.
4.8 Toggle Bit
In addition to DATA polling the AT29C512 provides another method for determining the end of a
program or erase cycle. During a program or erase operation, successive attempts to read data
from the device will result in I/O6 toggling between one and zero. Once the program cycle has
completed, I/O6 will stop toggling and valid data will be read. Examining the toggle bit may begin
at any time during a program cycle.
4.9 Optional Chip Erase Mode
The entire device can be erased by using a 6-byte software code. Please see Software Chip
Erase application note for details.
5. Absolute Maximum Ratings*
Temperature Under Bias................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ...................................-0.6V to +6.25V
All Output Voltages
with Respect to Ground .............................-0.6V to VCC + 0.6V
Voltage on OE
with Respect to Ground ...................................-0.6V to +13.5V
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
0456H–FLASH–2/05
5
5 Page 
18. Software Data Protection
Enable Algorithm(1)
LOAD DATA AA
TO
ADDRESS 5555
AT29C512
19. Software Data Protection
Disable Algorithm(1)
LOAD DATA AA
TO
ADDRESS 5555
LOAD DATA 55
TO
ADDRESS 2AAA
LOAD DATA 55
TO
ADDRESS 2AAA
LOAD DATA A0
TO
ADDRESS 5555
WRITES ENABLED
LOAD DATA 80
TO
ADDRESS 5555
LOAD DATA
TO
PAGE (128 BYTES)(4)
ENTER DATA
PROTECT STATE(2)
LOAD DATA AA
TO
ADDRESS 5555
LOAD DATA 55
TO
ADDRESS 2AAA
Notes:
1. Data Format: I/O7 - I/O0 (Hex);Address Format: A14
- A0 (Hex).
2. Data Protect state will be activated at end of program
cycle.
3. Data Protect state will be deactivated at end of pro-
gram period.
4. 128 bytes of data MUST BE loaded.
LOAD DATA 20
TO
ADDRESS 5555
EXIT DATA
PROTECT STATE(3)
LOAD DATA
TO
PAGE (128 BYTES)(4)
20. Software Protected Program Cycle Waveform(1)(2)(3)
OE (1)
CE
WE
A0-A6
tAS
tWP
tAH
tWPH
tDH
BYTE ADDRESS
tBLC
Notes:
A7-A15 (2)
DATA (3)
5555
2AAA
tDS
AA
55
5555
SECTOR ADDRESS
A0
BYTE 0
BYTE 126
BYTE 127
tWC
1. A7 through A15 must specify the page address during each high-to-low transition of WE (or CE) after the software code has
been entered.
2. OE must be high when WE and CE are both low.
3. All bytes that are not loaded within the sector being programmed will be indeterminate.
0456H–FLASH–2/05
11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet 29C512.PDF ] | |
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